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公开(公告)号：US20160189683A1
公开(公告)日：2016-06-30
申请号：US14644977
申请日：2015-03-11
发明人： Yi-Kai Chen , Chi-Chung Tsai , En-Chih Liu , Ying-Hui Chen , Yen-Yu Huang
CPC分类号： G09G5/18 , G09G3/3677 , G09G3/3696 , G09G2310/0286
摘要： A display panel including a pixel array and a gate driver circuit is provided. The pixel array has a plurality of pixels. The gate driver circuit is used for providing a plurality of gate signals to the pixels and includes a plurality of shift registers and a plurality of demultiplexers. The shift registers respectively receive a first gate signal of the gate signals and a first clock signal of a plurality of clock signals to respectively provide a first control signal and a second control signal. The demultiplexers respectively receive a plurality of second clock signals of the clock signals, respectively turn-on according to the first control signal provided by the corresponding one of the shift registers, and respectively cut-off according to the second control signal provided by the corresponding one of the shift registers.
摘要翻译： 提供了包括像素阵列和栅极驱动器电路的显示面板。 像素阵列具有多个像素。 栅极驱动器电路用于向像素提供多个栅极信号，并且包括多个移位寄存器和多个解复用器。 移位寄存器分别接收门信号的第一门信号和多个时钟信号的第一时钟信号，以分别提供第一控制信号和第二控制信号。 解复用器分别根据由相应的一个移位寄存器提供的第一控制信号分别接收时钟信号的多个第二时钟信号，并且根据相应的第二控制信号分别接收切断 其中一个移位寄存器。
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公开(公告)号：US20150325700A1
公开(公告)日：2015-11-12
申请号：US14453616
申请日：2014-08-07
发明人： En-Chih Liu , Ying-Hui Chen , Ya-Ju Lu , Yen-Yu Huang
IPC分类号： H01L29/786 , H01L29/04
CPC分类号： H01L29/66969 , H01L27/1259 , H01L29/04 , H01L29/41733 , H01L29/66765 , H01L29/7869
摘要： A thin film transistor disposed above a carrying surface of a substrate is provided. The thin film transistor includes a gate, a first insulation layer, a channel, a source, a second insulation layer and a drain. The gate and the channel are overlapped with each other in a normal direction of the carrying surface. The first insulation layer is disposed between the channel and the gate. The source covers a portion of the channel and is electrically connected to the portion of the channel. The channel is located between the source and the first insulation layer in the normal direction. The source is disposed between the second insulation layer and the channel. The second insulation layer has a first hole exposing another portion of the channel. The drain is filled in the first hole and electrically connected to the another portion of the channel. Moreover, a pixel structure is provided.
摘要翻译： 提供了设置在基板的承载表面上方的薄膜晶体管。 薄膜晶体管包括栅极，第一绝缘层，沟道，源极，第二绝缘层和漏极。 栅极和沟道在承载表面的法线方向上彼此重叠。 第一绝缘层设置在通道和栅极之间。 源极覆盖通道的一部分并且电连接到通道的该部分。 通道沿正向位于源极和第一绝缘层之间。 源设置在第二绝缘层和沟道之间。 第二绝缘层具有暴露通道的另一部分的第一孔。 排水口填充在第一孔中并电连接到通道的另一部分。 此外，提供像素结构。
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公开(公告)号：US09626895B2
公开(公告)日：2017-04-18
申请号：US14834800
申请日：2015-08-25
发明人： Chi-Chung Tsai , Yi-Kai Chen , En-Chih Liu , Yen-Yu Huang
CPC分类号： G09G3/2092 , G09G3/3266 , G09G2300/0804 , G09G2300/0871 , G09G2310/0232 , G09G2310/0248 , G09G2310/0267 , G09G2310/0286 , G09G2310/04 , G09G2310/08
摘要： A gate driving circuit is provided. The gate driving circuit includes a plurality of gate driving units sequentially coupled to each other. Each of the gate driving units includes a shift register and a de-multiplexer. The shift register receives a start pulse signal, and generates a first control signal and a second control signal according to the start pulse signal and a scan controlling signal, where when the shift register converts the first control signal into the second control signal, the shift register pulls down a voltage level of the first control signal according to the second control signal. The de-multiplexer receives a part of a plurality of clock signals for generating a plurality of gate signals sequentially according to the first control signal, where the clock signals are enabled sequentially, and enable periods of two sequential clock signals are partially overlapped with each other.
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公开(公告)号：US20170061855A1
公开(公告)日：2017-03-02
申请号：US14834800
申请日：2015-08-25
发明人： Chi-Chung Tsai , Yi-Kai Chen , En-Chih Liu , Yen-Yu Huang
IPC分类号： G09G3/20
CPC分类号： G09G3/2092 , G09G3/3266 , G09G2300/0804 , G09G2300/0871 , G09G2310/0232 , G09G2310/0248 , G09G2310/0267 , G09G2310/0286 , G09G2310/04 , G09G2310/08
摘要： A gate driving circuit is provided. The gate driving circuit includes a plurality of gate driving units sequentially coupled to each other. Each of the gate driving units includes a shift register and a de-multiplexer. The shift register receives a start pulse signal, and generates a first control signal and a second control signal according to the start pulse signal and a scan controlling signal, where when the shift register converts the first control signal into the second control signal, the shift register pulls down a voltage level of the first control signal according to the second control signal. The de-multiplexer receives a part of a plurality of clock signals for generating a plurality of gate signals sequentially according to the first control signal, where the clock signals are enabled sequentially, and enable periods of two sequential clock signals are partially overlapped with each other.
摘要翻译： 提供了栅极驱动电路。 栅极驱动电路包括彼此顺序耦合的多个栅极驱动单元。 每个门驱动单元包括移位寄存器和去多路复用器。 移位寄存器接收起始脉冲信号，并根据起始脉冲信号和扫描控制信号产生第一控制信号和第二控制信号，其中当移位寄存器将第一控制信号转换为第二控制信号时，移位寄存器 寄存器根据第二控制信号拉低第一控制信号的电压电平。 解复用器接收多个时钟信号的一部分，用于根据第一控制信号顺序地产生多个门信号，其中时钟信号被顺序地使能，并且两个连续时钟信号的使能周期彼此部分重叠 。
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5.发明授权Thin film transistor with a ring-shaped hole of a stopper layer and pixel structure having the thin film transistor 有权具有阻挡层的环形孔的薄膜晶体管和具有薄膜晶体管的像素结构公开(公告)号：US09337349B2
公开(公告)日：2016-05-10
申请号：US14339462
申请日：2014-07-24
发明人： En-Chih Liu , Ying-Hui Chen , Yen-Yu Huang
IPC分类号： H01L29/66 , H01L21/441 , H01L29/786
CPC分类号： H01L29/78693 , H01L27/1259 , H01L29/66765 , H01L29/66969 , H01L29/78696
摘要： A thin film transistor including a gate, a channel, a stopper layer, a source and a drain is provided. The channel and the gate are overlapped. The stopper layer covers a portion of the channel and has a ring-shape hole exposing two opposite connecting portions of the channel. A portion of the stopper layer is disposed between the source and the channel and between the drain and the channel. The source and the drain are filled in the ring-shape hole of the stopper layer and electrically connected to the connecting portions of the channel. Moreover, a pixel structure including the thin film transistor is provided.
摘要翻译： 提供了包括栅极，沟道，阻挡层，源极和漏极的薄膜晶体管。 通道和门重叠。 止挡层覆盖通道的一部分，并且具有暴露通道的两个相对连接部分的环形孔。 阻挡层的一部分设置在源极和沟道之间以及漏极和沟道之间。 源极和漏极填充在阻挡层的环形孔中并电连接到沟道的连接部分。 此外，提供了包括薄膜晶体管的像素结构。
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公开(公告)号：US09870756B2
公开(公告)日：2018-01-16
申请号：US14644977
申请日：2015-03-11
发明人： Yi-Kai Chen , Chi-Chung Tsai , En-Chih Liu , Ying-Hui Chen , Yen-Yu Huang
CPC分类号： G09G5/18 , G09G3/3677 , G09G3/3696 , G09G2310/0286
摘要： A display panel including a pixel array and a gate driver circuit is provided. The pixel array has a plurality of pixels. The gate driver circuit is used for providing a plurality of gate signals to the pixels and includes a plurality of shift registers and a plurality of demultiplexers. The shift registers respectively receive a first gate signal of the gate signals and a first clock signal of a plurality of clock signals to respectively provide a first control signal and a second control signal. The demultiplexers respectively receive a plurality of second clock signals of the clock signals, respectively turn-on according to the first control signal provided by the corresponding one of the shift registers, and respectively cut-off according to the second control signal provided by the corresponding one of the shift registers.
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公开(公告)号：US20160027873A1
公开(公告)日：2016-01-28
申请号：US14506693
申请日：2014-10-06
发明人： Shin-Chuan Chiang , En-Chih Liu , Yu-Hsien Chen , Ya-Ju Lu , Yen-Yu Huang
IPC分类号： H01L29/08 , H01L29/786
CPC分类号： H01L29/0847 , H01L29/41733 , H01L29/45 , H01L29/458 , H01L29/786
摘要： The thin film transistor includes a gate, a gate insulating layer, a semiconductor layer, and a source and a drain. The gate insulating layer covers the gate. The semiconductor layer is located on the gate insulating layer which is disposed above the gate. The source and the drain are disposed above the gate insulating layer and are electrically connected to the semiconductor layer, respectively. The source and the drain are respectively located in different layers. A first contact resistance is existed between the semiconductor layer and the source, a second contact resistance is existed between the semiconductor layer and the drain, and. the first contact resistance is less than the second contact resistance.
摘要翻译： 薄膜晶体管包括栅极，栅极绝缘层，半导体层以及源极和漏极。 栅极绝缘层覆盖栅极。 半导体层位于栅极上方的栅极绝缘层上。 源极和漏极分别设置在栅极绝缘层上方并与半导体层电连接。 源极和漏极分别位于不同的层。 在半导体层和源极之间存在第一接触电阻，在半导体层和漏极之间存在第二接触电阻。 第一接触电阻小于第二接触电阻。
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公开(公告)号：US20150325706A1
公开(公告)日：2015-11-12
申请号：US14339462
申请日：2014-07-24
发明人： En-Chih Liu , Ying-Hui Chen , Yen-Yu Huang
IPC分类号： H01L29/786
CPC分类号： H01L29/78693 , H01L27/1259 , H01L29/66765 , H01L29/66969 , H01L29/78696
摘要： A thin film transistor including a gate, a channel, a stopper layer, a source and a drain is provided. The channel and the gate are overlapped. The stopper layer covers a portion of the channel and has a ring-shape hole exposing two opposite connecting portions of the channel. A portion of the stopper layer is disposed between the source and the channel and between the drain and the channel. The source and the drain are filled in the ring-shape hole of the stopper layer and electrically connected to the connecting portions of the channel. Moreover, a pixel structure including the thin film transistor is provided.
摘要翻译： 提供了包括栅极，沟道，阻挡层，源极和漏极的薄膜晶体管。 通道和门重叠。 止挡层覆盖通道的一部分，并且具有暴露通道的两个相对连接部分的环形孔。 阻挡层的一部分设置在源极和沟道之间以及漏极和沟道之间。 源极和漏极填充在阻挡层的环形孔中并电连接到沟道的连接部分。 此外，提供了包括薄膜晶体管的像素结构。
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公开(公告)号：US20200013336A1
公开(公告)日：2020-01-09
申请号：US16131052
申请日：2018-09-14
发明人： Shang-Jung Yang , Chin-Hai Huang , Ya-Ju Lu , En-Chih Liu
IPC分类号： G09G3/3258 , G09G3/3266 , G09G3/3291
摘要： A pixel circuit is provided. In the pixel circuit, a first transistor has a first terminal coupled to a first node and a second terminal receiving a system high voltage, and the first transistor is controlled by a light emitting signal. A first terminal and a second terminal of a second transistor are respectively coupled to a second node and the first node; a control terminal of the second transistor is coupled to a third node. The third transistor is coupled between the first node and the third node and controlled by a first scan signal. A capacitor has a first terminal and a second terminal. A voltage setting circuit receives a data signal, a second scan signal, and a third scan signal. A first terminal of the light emitting device is coupled to the second node; a second terminal of the light emitting device receives a system low voltage.
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公开(公告)号：US20190130823A1
公开(公告)日：2019-05-02
申请号：US15867729
申请日：2018-01-11
发明人： Shang-Jung Yang , Chi-Chung Tsai , Chin-Hai Huang , En-Chih Liu , Yen-Yu Huang
IPC分类号： G09G3/3225
摘要： The disclosure provides a pixel circuit for driving a light emitting diode. A second terminal of a driving transistor is coupled to a first terminal of the light emitting diode, and a control terminal of the driving transistor receives a bias voltage. A coupling switch is coupled between a first terminal and the control terminal of the driving transistor and controlled by a first selection signal to be turned on or off. A first terminal of a first switch receives a display data voltage or a reference voltage, and the first switch is controlled by a second selection signal to be turned on or off. A first terminal of a second switch is coupled to a second terminal of the first switch. A second terminal of the second switch is coupled between the second terminal of the driving transistor and the light emitting diode, and the second switch is controlled by the first selection signal to be turned on or off. A first terminal of a capacitor is coupled between the second terminal of the first switch and the first terminal of the second switch, and a second terminal of the capacitor supplies the bias voltage to the control terminal of the driving transistor. An emitting switch is coupled between an operating power supply and the first terminal of the driving transistor and controlled by an emitting control signal to be turned on or off.
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