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公开(公告)号：US20180159488A1
公开(公告)日：2018-06-07
申请号：US15884912
申请日：2018-01-31
Inventor： Xin ZHAO , Tejasvi DAS , Xiaofan FEI , Alan Mark MORTON
CPC classification number: H03F3/2171 , H03F1/32 , H03F1/342 , H03F3/181 , H03F3/187 , H03F3/217 , H03F3/2173 , H03F3/38 , H03F3/72 , H03F2200/345 , H03F2200/351
Abstract: An amplifier may include a first stage configured to receive an input signal at an amplifier input and generate an intermediate signal which is a function of the input signal, and a final output stage configured to generate an output signal which is a function of the intermediate signal at an amplifier output, and a signal feedback network coupled between the amplifier output and input. The final output stage may be switchable among a plurality of modes including at least a first mode in which the final output stage generates the output signal as a modulated output signal which is a function of the intermediate signal, and a second mode in which the final output stage generates the output signal as an unmodulated output signal which is a function of the intermediate signal. Structure of the feedback network and the first stage may remain static when switching between modes.
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公开(公告)号：US20180091102A1
公开(公告)日：2018-03-29
申请号：US15277465
申请日：2016-09-27
Inventor： Xin ZHAO , Tejasvi DAS , Xiaofan FEI , Alan Mark MORTON
CPC classification number: H03F3/2171 , H03F1/32 , H03F1/342 , H03F3/181 , H03F3/187 , H03F3/217 , H03F3/2173 , H03F3/38 , H03F3/72 , H03F2200/345 , H03F2200/351
Abstract: An amplifier may include a first stage configured to receive an input signal at an amplifier input and generate an intermediate signal which is a function of the input signal, and a final output stage configured to generate an output signal which is a function of the intermediate signal at an amplifier output, and a signal feedback network coupled between the amplifier output and input. The final output stage may be switchable among a plurality of modes including at least a first mode in which the final output stage generates the output signal as a modulated output signal which is a function of the intermediate signal, and a second mode in which the final output stage generates the output signal as an unmodulated output signal which is a function of the intermediate signal. Structure of the feedback network and the first stage may remain static when switching between modes.
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公开(公告)号：US20190115909A1
公开(公告)日：2019-04-18
申请号：US16219187
申请日：2018-12-13
Inventor： Tejasvi DAS , Alan Mark MORTON , Xin ZHAO , Lei ZHU , Xiaofan FEI , Johann G. GABORIAU , John L. MELANSON , Amar VELLANKI
CPC classification number: H03K7/08 , G06F1/025 , H02M3/157 , H02M2001/0012 , H03F3/183 , H03F3/2175
Abstract: A system may include a digital pulse width modulator subsystem, a first path coupled to an output of the digital pulse width modulator subsystem and configured to drive an open-loop driver stage, a second path coupled to the output of the digital pulse width modulator subsystem and configured to drive a closed-loop analog pulse width modulator, a controller to select between the first path and the second path for processing a signal based on one or more characteristics of the signal, and a calibration subsystem configured to calibrate at least one of a first gain of the first path and a second gain of the second path in order that the first gain and the second gain are at least approximately equal at the time of switching selection between the first path and the second path or vice versa, in order to minimize artifacts due to the switching.
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公开(公告)号：US20190115886A1
公开(公告)日：2019-04-18
申请号：US16133045
申请日：2018-09-17
Inventor： Tejasvi DAS , Alan Mark MORTON , Xin ZHAO , Lei ZHU , Xiaofan FEI , Johann G. GABORIAU , John L. MELANSON , Amar VELLANKI
Abstract: A system may include a digital pulse width modulator subsystem, a first path coupled to an output of the digital pulse width modulator subsystem, a second path coupled to the output of the digital pulse width modulator subsystem and configured to drive a closed-loop analog pulse width modulator, a controller to select between the first path and the second path for processing a signal based on one or more characteristics of the signal, wherein a first gain of the first path and a second gain of the second path are approximately equal at the time of switching selection between the first path and the second path or vice versa, in order to minimize artifacts due to the switching.
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