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公开(公告)号:US20200059200A1
公开(公告)日:2020-02-20
申请号:US16348824
申请日:2018-04-27
Inventor: Graeme Gordon MACKAY , Lei ZHU , Ku HE , Vamsikrishna PARUPALLI
Abstract: In accordance with embodiments of the present disclosure, a method for power supply rejection for an amplifier may include generating a correction signal by multiplying a quantity indicative of a power supply voltage of the amplifier by a transfer function defining a response from the power supply voltage of the amplifier to an output signal of the amplifier and subtracting the correction signal from a signal within a signal path of a circuit comprising the amplifier.
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公开(公告)号:US20190115909A1
公开(公告)日:2019-04-18
申请号:US16219187
申请日:2018-12-13
Inventor: Tejasvi DAS , Alan Mark MORTON , Xin ZHAO , Lei ZHU , Xiaofan FEI , Johann G. GABORIAU , John L. MELANSON , Amar VELLANKI
CPC classification number: H03K7/08 , G06F1/025 , H02M3/157 , H02M2001/0012 , H03F3/183 , H03F3/2175
Abstract: A system may include a digital pulse width modulator subsystem, a first path coupled to an output of the digital pulse width modulator subsystem and configured to drive an open-loop driver stage, a second path coupled to the output of the digital pulse width modulator subsystem and configured to drive a closed-loop analog pulse width modulator, a controller to select between the first path and the second path for processing a signal based on one or more characteristics of the signal, and a calibration subsystem configured to calibrate at least one of a first gain of the first path and a second gain of the second path in order that the first gain and the second gain are at least approximately equal at the time of switching selection between the first path and the second path or vice versa, in order to minimize artifacts due to the switching.
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公开(公告)号:US20180316349A1
公开(公告)日:2018-11-01
申请号:US15582257
申请日:2017-04-28
Inventor: Yongjie CHENG , Lei ZHU , Kyehyung LEE
Abstract: In accordance with embodiments of the present disclosure, a system may include a buffer and a switch coupled between the buffer and a voltage supply such that the switch controls a varying voltage at a varying voltage node coupled to the buffer.
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公开(公告)号:US20210175896A1
公开(公告)日:2021-06-10
申请号:US16945520
申请日:2020-07-31
Inventor: John L. MELANSON , Johann G. GABORIAU , Lei ZHU , Wai-Shun SHUM , Xiaofan FEI , Leyi YIN
Abstract: A system may include a current digital-to-analog converter (IDAC) configured to convert a digital input signal into an output current signal and a switched-mode power supply configured to provide electrical energy in the form of a supply voltage to the IDAC for operation of the IDAC, the switched-mode power supply configured to track a voltage signal derived from the digital input current signal and generate the supply voltage based on the voltage signal and a voltage headroom above the voltage signal.
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公开(公告)号:US20210175895A1
公开(公告)日:2021-06-10
申请号:US16945288
申请日:2020-07-31
Inventor: John L. MELANSON , Johann G. GABORIAU , Lei ZHU , Wai-Shun SHUM , Xiaofan FEI , Leyi YIN
Abstract: A differential output current digital-to-analog (IDAC) circuit may include a delta-sigma modulator configured to receive a digital input signal, a control circuit responsive to the delta-sigma modulator configured to perform a DAC decode operation, a plurality of DAC elements responsive to the DAC decode operation, the plurality of DAC elements configured to, in concert, generate a differential output current signal based on the digital input signal to a load coupled to a pair of output terminals of the IDAC, and an output impedance coupled between the pair of output terminals such that the output impedance is in parallel with the load.
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6.
公开(公告)号:US20200044616A1
公开(公告)日:2020-02-06
申请号:US16190427
申请日:2018-11-14
Inventor: Tejasvi DAS , Eric J. KING , Xin ZHAO , Xiaofan FEI , Johann G. GABORIAU , Lei ZHU , John L. MELANSON , Thomas HOFF
Abstract: A system may include a digital modulator configured to modulate an input signal received at an input of the digital modulator to generate a modulated input signal at an output of the digital modulator, a digital gain element having a digital gain and coupled to the digital modulator, an open-loop Class-D amplifier coupled to an output of the digital modulator and configured to amplify the modulated input signal, wherein the open-loop Class-D amplifier is powered from a variable power supply having a variable supply voltage which is variable in response to one or more characteristics of the input signal, and a control circuit configured to control the digital gain to approximately cancel changes in an analog gain of the open-loop Class-D amplifier due to variation in the variable supply voltage in response to the one or more characteristics of the input signal.
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公开(公告)号:US20180316313A1
公开(公告)日:2018-11-01
申请号:US15582233
申请日:2017-04-28
Inventor: Graeme Gordon MACKAY , Lei ZHU , Ku HE , Vamsikrishna PARUPALLI
CPC classification number: H03F1/0233 , H03F1/0227 , H03F1/025 , H03F1/30 , H03F3/187 , H03F3/213 , H03F3/45475 , H03F3/45973 , H03F3/45982 , H03F2200/03 , H03F2200/375 , H03F2200/511 , H03F2203/45022 , H03F2203/45042 , H03F2203/45152 , H03F2203/45212 , H03F2203/45528 , H03F2203/45588 , H03F2203/45594 , H03F2203/45596 , H03F2203/45601 , H03F2203/45681
Abstract: In accordance with embodiments of the present disclosure, a method for power supply rejection for an amplifier may include generating a correction signal by multiplying a quantity indicative of a power supply voltage of the amplifier by a transfer function defining a response from the power supply voltage of the amplifier to an output signal of the amplifier and subtracting the correction signal from a signal within a signal path of a circuit comprising the amplifier.
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公开(公告)号:US20210175322A1
公开(公告)日:2021-06-10
申请号:US17019621
申请日:2020-09-14
Inventor: John L. MELANSON , Lei ZHU , Wai-Shun SHUM , Xiaofan FEI , Johann G. GABORIAU
IPC: H01L49/02 , H01L23/522 , H03F1/02
Abstract: A single integrated circuit may include a signal path configured to generate an output signal from an input signal, wherein the signal path includes an amplifier configured to drive the output signal, a direct-current-to-direct-current (DC-DC) power converter having a power inductor integrated in the single integrated circuit and configured to generate a supply voltage to the amplifier from a source voltage to the DC-DC power converter, and control circuitry for controlling operation of converter switches of the DC-DC power converter in order that the supply voltage tracks at least one among the input signal and the output signal.
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公开(公告)号:US20200177167A1
公开(公告)日:2020-06-04
申请号:US16784392
申请日:2020-02-07
Inventor: Jing BAI , Tejasvi DAS , Xin ZHAO , Lei ZHU , Xiaofan FEI
IPC: H03K3/01 , H03K17/687
Abstract: A driver system may include a first n-type field-effect transistor coupled at its non-gate terminals between an output of the driver system and a first terminal of a supply voltage and configured to drive the output when the first n-type field-effect transistor is activated, a second n-type field-effect transistor coupled at its non-gate terminals between an output of the driver system and a second terminal of the supply voltage and configured to drive the output when the second n-type field-effect transistor is activated, a high-side capacitor coupled to the output of the driver system, and a low-side capacitor coupled to the second terminal of the supply voltage, wherein the high-side capacitor and the low-side capacitor are configured to track and correct for mismatches between a first resistance of the first n-type field-effect transistor and a second resistance of the second n-type field-effect transistor.
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公开(公告)号:US20200036352A1
公开(公告)日:2020-01-30
申请号:US16181762
申请日:2018-11-06
Inventor: Lei ZHU , Tejasvi DAS , John L. MELANSON , Wai-shun Wilson SHUM , Jing BAI , Xin ZHAO , Xiaofan FEI
Abstract: A system may include a digital modulator configured to modulate an input signal received at an input of the digital modulator to generate a modulated input signal at an output of the digital modulator, a digital gain element having a digital gain and coupled to the digital modulator, an open-loop Class-D amplifier coupled to an output of the digital modulator and configured to amplify the modulated input signal, wherein the open-loop Class-D amplifier is powered from a variable power supply having a variable supply voltage which is variable in response to one or more characteristics of the input signal, and a control circuit configured to control the digital gain to approximately cancel changes in an analog gain of the open-loop Class-D amplifier due to variation in the variable supply voltage in response to the one or more characteristics of the input signal.
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