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公开(公告)号：US20200334408A1
公开(公告)日：2020-10-22
申请号：US16852640
申请日：2020-04-20
Inventor： Michael R. KOBE , David KOSTUSIAK , Christian LARSEN
IPC: G06F30/398 , G06F30/20
Abstract: A method for enforcing design rules in a circuit layout may include providing a circuit schematic for an integrated circuit to a circuit simulator, wherein the circuit layout is derived from a circuit schematic, using the circuit simulator to simulate the circuit schematic and generate simulated electrical parameters for the integrated circuit, and using the simulated electrical parameters to enforce physical design rules when generating the circuit layout based on the simulated electrical parameters.
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公开(公告)号：US20190293691A1
公开(公告)日：2019-09-26
申请号：US16354781
申请日：2019-03-15
Inventor： Katy HOLLAND , Vamsikrishna PARUPALLI , Christian LARSEN , Graeme MACKAY
Abstract: A method for calculating a calibration gain used for common-mode rejection in a current sensing system may include measuring a first value of a common-mode voltage associated with the current sensing system and a first output value of the current sensing system occurring at the first value of the common-mode voltage, measuring a second value of the common-mode voltage associated with the current sensing system and a second output value of the current sensing system occurring at the second value of the common-mode voltage, and based on a difference between the second output value of the current sensing system and the first output value of the current sensing system and a difference between the second value of the common-mode voltage and the first value of the common-mode voltage, calculating the calibration gain.
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公开(公告)号：US20170078213A1
公开(公告)日：2017-03-16
申请号：US15226197
申请日：2016-08-02
Inventor： Jeffrey A. MAY , Vivek JINDAL , Anu CHAKRAVARTY , Terence C. BOWNESS , Christian LARSEN
IPC: H04L12/863 , H04L12/40 , H04L29/08
CPC classification number: H04L47/6225 , G06F13/372 , H04L12/40 , H04L67/10 , Y02D10/14
Abstract: A distributed network system may include a shared communication bus that operates in accordance with a communication protocol and a plurality of devices coupled to the shared communication bus. The communication protocol may define periods of time and an order by which each of the plurality of devices actively transmit data on the shared communication bus such that only one of the plurality of devices actively transmits data on the shared communication bus at a time to a remaining number of the plurality of devices through the shared communication bus. When the remaining number of the plurality of devices are not actively transmitting data, the remaining number of the plurality of devices may receive data via the shared communication bus so that bi-directional communication is established among the plurality of devices on the shared communication bus.
Abstract translation: 分布式网络系统可以包括根据通信协议操作的共享通信总线和耦合到共享通信总线的多个设备。 通信协议可以定义时间段和多个设备中的每个设备在共享通信总线上主动发送数据的顺序，使得多个设备中的仅一个设备一次在共享通信总线上主动发送数据到剩余的 通过共享通信总线的多个设备的数量。 当多个设备的剩余数量不是主动发送数据时，多个设备的剩余数量可以经由共享通信总线接收数据，从而在共享通信总线上的多个设备之间建立双向通信。
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公开(公告)号：US20220247372A1
公开(公告)日：2022-08-04
申请号：US17162229
申请日：2021-01-29
Inventor： Wei XU , Ravi KUMMARAGUNTLA , Paul WILSON , Mujo KOZAK , Christian LARSEN , John L. MELANSON , Yongjie CHENG
IPC: H03F3/45
Abstract: A system may include a front end differential amplifier having two input terminals, two input resistors, each of the two input resistors coupled to a respective one of the two input terminals, and an input common mode biasing circuit for an output stage of the front end differential amplifier, the input common mode biasing circuit comprising two current sources configured to generate currents for biasing the output stage of the front end differential amplifier.
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公开(公告)号：US20210050832A1
公开(公告)日：2021-02-18
申请号：US16986623
申请日：2020-08-06
Inventor： Jason W. LAWRENCE , Eric J. KING , Christian LARSEN , Hasnain AKRAM , Eric KIMBALL
Abstract: A method for operating a charge pump having a variable switching frequency may include comparing a target minimum output voltage with an output voltage generated at an output of the charge pump and controlling switching of switches of the charge pump based on the comparison such that the variable switching frequency varies as an output current driven by the charge pump varies.
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Patent Agency Ranking
公开(公告)号：US20180109181A1
公开(公告)日：2018-04-19
申请号：US15783506
申请日：2017-10-13
Inventor： Eric J. KING , Aaron J. BRENNAN , Christian LARSEN , John L. MELANSON , Yongjie CHENG , Adrian COLLI-MENCHI
IPC: H02M3/07
CPC classification number: H02M3/07 , H02M1/32 , H02M2001/0045 , H03F1/0211 , H03F3/187 , H03F3/21 , H03F3/213 , H03F2200/03 , H03M1/66
Abstract: A system may include a charge pump configured to operate in a plurality of modes including a first mode in which the ratio of an output voltage to an input voltage of the charge pump is a first ratio and a second mode in which the ratio is a second ratio and a controller configured to limit current flowing between a power source of the charge pump to the charge pump, wherein the power source provides the input voltage, by limiting a transfer of charge between the power source and the charge pump during a switching cycle of the charge pump responsive to a change in operation between modes of the plurality of modes.
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公开(公告)号：US20180041173A1
公开(公告)日：2018-02-08
申请号：US15661446
申请日：2017-07-27
Inventor： Emmanuel MARCHAIS , Lingli ZHANG , Eric J. KING , Christian LARSEN
CPC classification number: H03F1/32 , H03F3/187 , H03F3/2175 , H03F2200/165 , H03F2200/351
Abstract: In accordance with embodiments of the present disclosure, a system may have a configurable control loop technology, wherein the system comprises a first mode control loop, a second mode control loop and a reconfigurable pulse width modulator (PWM) configured to generate an output signal from an input signal. The reconfigurable PWM may include a digital PWM and an analog PWM and may be configured such that when the first mode control loop is activated, the reconfigurable PWM utilizes the analog PWM to generate the output signal from the input signal and when the second mode control loop is activated, the reconfigurable PWM utilizes the digital PWM to generate the output signal from the input signal and the digital PWM receives its input from a digital proportional integral derivative controller.
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8.发明公开公开(公告)号：US20230336068A1
公开(公告)日：2023-10-19
申请号：US18337223
申请日：2023-06-19
Inventor： Jeffrey A. MAY , Eric J. KING , Christian LARSEN , Eric EKLUND
CPC classification number: H02M1/0019 , H02J7/0063 , H02M1/42 , H02M3/1582 , H04R1/1091
Abstract: A power converter system may include a first power converter configured to couple via its input to a power source and configured to convert an input voltage provided by the power source to an intermediate voltage, a second power converter coupled via its input to an output of the first power converter and configured to convert the intermediate voltage to a regulated output voltage, a capacitor coupled at one of its terminals to an electrical node of the intermediate voltage. Based on one or more electrical parameters of the power converter, the second power converter is controlled to regulate the regulated output voltage at a substantially constant level and the first power converter is controlled to control the intermediate voltage to maintain the intermediate voltage between a maximum voltage and a minimum voltage and regulate an input current drawn from the power source at a substantially constant level.
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公开(公告)号：US20220286050A1
公开(公告)日：2022-09-08
申请号：US17825775
申请日：2022-05-26
Inventor： Eric J. KING , Ajit SHARMA , Lingli ZHANG , Christian LARSEN , Graeme G. MACKAY
Abstract: A system may include a power converter having a maximum allowable input power drawn from a power source, an energy storage element coupled to an output of the power converter at a top plate of the energy storage element, wherein the energy storage element is configured to store excess energy, and control circuity configured to, when an input power of the power converter exceeds the maximum allowable input power, cause excess energy stored in the energy storage element to be consumed by circuitry coupled to the output of the power converter, and in order to maintain positive voltage headroom for the circuitry coupled to the output of the power converter, selectively couple a bottom plate of the energy storage element to the power source such that excess energy stored by the circuitry coupled to the output of the power converter is consumed from the energy storage device when the input power of the power converter exceeds the maximum allowable input power.
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公开(公告)号：US20190103490A1
公开(公告)日：2019-04-04
申请号：US15720977
申请日：2017-09-29
Inventor： Scott WARRICK , Justin DOUGHERTY , Alexander BARR , Christian LARSEN , Marc L. TARABBIA , Ying YING
IPC: H01L29/78 , H01L21/8238 , H01L29/06 , H01L21/76
Abstract: A dual-gate metal-oxide-semiconductor field-effect transistor (MOSFET) may include a MOSFET having a channel region, a drain, and a source, a first gate formed proximate to the channel region, a drain extension region formed proximate to the drain, and a second gate formed proximate to the drain extension region.
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