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公开(公告)号：US20230378677A1
公开(公告)日：2023-11-23
申请号：US18300956
申请日：2023-04-14
Applicant: Cisco Technology, Inc.
Inventor： Mike SAPOZHNIKOV , Sayed Ashraf MAMUN , D. Brice ACHKIR , David NOZADZE , Amendra KOUL , Upendranadh R. KARETI
CPC classification number: H01R13/2414 , H01B11/18 , H01R43/007
Abstract: A communication interconnect system is described. The system may include a co-packaged cables (CPC) tile with a slot formed from a first surface to slot surface at a first depth in the CPC tile and a plurality of channels formed between the slot surface and a second surface opposite the first surface. The system may also include a twinaxial cable with a pair of conductors positioned in the slot such that the pair of conductors are inserted in a pair of channels of the plurality of channels to establish an electrical connection between the twinaxial cable and the pair of channels. The system also includes a plurality of elastomer pins positioned in the plurality of channels adjacent to the second surface.
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公开(公告)号：US20240332154A1
公开(公告)日：2024-10-03
申请号：US18190911
申请日：2023-03-27
Applicant: Cisco Technology, Inc.
Inventor： Wenbin MA , Yuqing ZHU , Weiying DING , Mingtong ZUO , Mike SAPOZHNIKOV , Srinath PENUGONDA , David NOZADZE
IPC: H01L23/498 , H01L23/00
CPC classification number: H01L23/49838 , H01L24/13 , H01L24/14 , H01L24/16 , H01L2224/13111 , H01L2224/13139 , H01L2224/13147 , H01L2224/1413 , H01L2224/16227
Abstract: A printed circuit board includes a grid of pads and tracks. The grid of pads includes a first pair of adjacent signal pads arranged in a first column and a second pair of adjacent signal pads arranged in a first row. A first signal pad of the second pair is arranged in the first column. The grid of pads also includes a third pair of adjacent signal pads arranged in a second row. A second signal pad of the first pair is arranged in the second row. The grid of pads further includes a fourth pair of adjacent signal pads arranged in a second column. A third signal pad of the third pair is arranged in the second column. A fourth signal pad of the fourth pair is arranged in the first row. The tracks are electrically coupled to the first, second, third, and fourth pairs.
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公开(公告)号：US20220359366A1
公开(公告)日：2022-11-10
申请号：US17446729
申请日：2021-09-02
Applicant: Cisco Technology, Inc.
Inventor： Mike SAPOZHNIKOV , Sayed Ashraf MAMUN , Tomer OSI , Amendra KOUL , David NOZADZE , Upendranadh R. KARETI , Joel R. GOERGEN
IPC: H01L23/50 , H01L23/367 , H01L23/498
Abstract: An apparatus includes an integrated circuit package and a heatsink. The integrated circuit package includes a substrate, an integrated circuit, a first plurality of signal conductors, and a second plurality of signal conductors. The substrate includes a first surface and a second surface opposite the first surface. The integrated circuit is coupled to the first surface of the substrate. The first plurality of signal conductors are arranged along a periphery of the first surface of the substrate. The second plurality of signal conductors are arranged along a periphery of the second surface of the substrate. The heatsink includes a first portion positioned along the first surface of the substrate and a second portion positioned along the second surface of the substrate.
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公开(公告)号：US20220360005A1
公开(公告)日：2022-11-10
申请号：US17653466
申请日：2022-03-04
Applicant: Cisco Technology, Inc.
Inventor： Mike SAPOZHNIKOV , Sayed Ashraf MAMUN , Tomer OSI , Amendra KOUL , David NOZADZE , Upendranadh R. KARETI , Joel R. GOERGEN
Abstract: Certain aspects of the present disclosure provide techniques for pinless interconnect for twinaxial cables to an IC. This includes a socket coupled to an integrated circuit (IC), a port structure coupled to the socket, and a ground connector inserted into the port structure. It further includes a twinaxial cable including a pair of conductors inserted through the ground connector to establish an electrical connection between the twinaxial cable and the IC.
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