公开(公告)号：US10749506B2

公开(公告)日：2020-08-18

申请号：US16226917

申请日：2018-12-20

Applicant: Conversant Intellectual Property Management Inc.

Inventor： Barry Alan Hoberman ,  Daniel L. Hillman ,  Jon Shiell

IPC: H03K3/012 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3296 ,  H02J4/00

Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands wherein a power consumption of each power island within the plurality of power islands is independently controlled within said each power island. A power manager determines a target power level for one power island of the plurality of power islands. The power manager then determines an action to change a consumption power level of said one power island of the plurality of power islands to the target power level. The power manager performs the action to change the consumption power level of said one power island of the plurality of power islands to the target power level.

公开(公告)号：US20160315615A1

公开(公告)日：2016-10-27

申请号：US15137424

申请日：2016-04-25

Applicant: Conversant Intellectual Property Management Inc.

Inventor： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

IPC: H03K19/00 ,  G11C5/14 ,  H02M3/07 ,  H03K19/003 ,  H03K3/037 ,  H03K3/356

CPC classification number: H03K19/0016 ,  G11C5/14 ,  G11C5/144 ,  G11C5/148 ,  H02M3/07 ,  H03K3/0372 ,  H03K3/356086 ,  H03K3/356113 ,  H03K5/14 ,  H03K17/102 ,  H03K19/00315

Abstract: An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.

公开(公告)号：US10243542B2

公开(公告)日：2019-03-26

申请号：US15490557

申请日：2017-04-18

Applicant: Conversant Intellectual Property Management Inc.

Inventor： Barry Alan Hoberman ,  Daniel L. Hillman ,  Jon Shiell

IPC: G06F1/32 ,  H02J4/00 ,  H03K3/012 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3296

Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands wherein a power consumption of each power island within the plurality of power islands is independently controlled within each of the power islands. A power manager determines a target power level for one power island of the plurality of power islands. The power manager then determines an action to change a consumption power level of the one power island of the plurality of power islands to the target power level. The power manager performs the action to change the consumption power level of the one power island of the plurality of power islands to the target power level.

公开(公告)号：US09350349B2

公开(公告)日：2016-05-24

申请号：US14480143

申请日：2014-09-08

Applicant: Conversant Intellectual Property Management Inc.

Inventor： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

IPC: H03K19/17 ,  H03K19/003 ,  G11C5/14 ,  H03K3/356 ,  H03K17/10 ,  H03K19/00 ,  H03K5/14

CPC classification number: H03K19/0016 ,  G11C5/14 ,  G11C5/144 ,  G11C5/148 ,  H02M3/07 ,  H03K3/0372 ,  H03K3/356086 ,  H03K3/356113 ,  H03K5/14 ,  H03K17/102 ,  H03K19/00315

Abstract: An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.

公开(公告)号：US20140375354A1

公开(公告)日：2014-12-25

申请号：US14480143

申请日：2014-09-08

Applicant: Conversant Intellectual Property Management Inc.

Inventor： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

IPC: H03K19/003 ,  H03K19/00 ,  H03K17/10 ,  H03K3/356 ,  H03K5/14

CPC classification number: H03K19/0016 ,  G11C5/14 ,  G11C5/144 ,  G11C5/148 ,  H02M3/07 ,  H03K3/0372 ,  H03K3/356086 ,  H03K3/356113 ,  H03K5/14 ,  H03K17/102 ,  H03K19/00315

Abstract: An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.

Abstract translation: 集成电路包括第一电路和睡眠晶体管电路。 第一个电路接收输入信号并处理输入信号。 第一电路还保持具有低泄漏的睡眠状态的数据。 睡眠晶体管电路耦合到第一电路并且接收具有负电压的睡眠信号。 休眠电路降低处于休眠状态的第一电路的功耗，以便在将数据保留在第一电路中的同时基于睡眠信号具有低泄漏。

公开(公告)号：US20140333134A1

公开(公告)日：2014-11-13

申请号：US14324297

申请日：2014-07-07

Applicant: Conversant Intellectual Property Management Inc.

Inventor： Barry Alan Hoberman ,  Daniel L. Hillman ,  Jon Shiell

IPC: H02J4/00

CPC classification number: H03K3/012 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3296 ,  H01L2924/00 ,  H01L2924/0002 ,  H02J4/00 ,  Y02D10/126 ,  Y02D10/172 ,  Y02D50/20 ,  Y10T307/406 ,  Y10T307/414

Abstract: A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands.

Abstract translation: 包括多个功率岛的集成电路的系统包括第一功率管理器和第二功率管理器。 第一个电源管理器根据集成电路的需求和操作管理集成电路的第一个功耗。 第二电源管理器与第一电源管理器通信并管理功率岛之一的第二功率消耗。

公开(公告)号：US10200015B2

公开(公告)日：2019-02-05

申请号：US15490557

申请日：2017-04-18

Applicant: Conversant Intellectual Property Management Inc.

Inventor： Barry Alan Hoberman ,  Daniel L. Hillman ,  Jon Shiell

IPC: G06F1/32 ,  H02J4/00 ,  H03K3/012

Abstract: Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands wherein a power consumption of each power island within the plurality of power islands is independently controlled within each of the power islands. A power manager determines a target power level for one power island of the plurality of power islands. The power manager then determines an action to change a consumption power level of the one power island of the plurality of power islands to the target power level. The power manager performs the action to change the consumption power level of the one power island of the plurality of power islands to the target power level.

公开(公告)号：US09722605B2

公开(公告)日：2017-08-01

申请号：US15137424

申请日：2016-04-25

Applicant: Conversant Intellectual Property Management Inc.

Inventor： Barry A. Hoberman ,  Daniel L. Hillman ,  William G. Walker ,  John M. Callahan ,  Michael A. Zampaglione ,  Andrew Cole

IPC: H03K19/17 ,  H03K19/00 ,  G11C5/14 ,  H03K3/356 ,  H03K17/10 ,  H03K5/14 ,  H03K19/003 ,  H02M3/07 ,  H03K3/037

CPC classification number: H03K19/0016 ,  G11C5/14 ,  G11C5/144 ,  G11C5/148 ,  H02M3/07 ,  H03K3/0372 ,  H03K3/356086 ,  H03K3/356113 ,  H03K5/14 ,  H03K17/102 ,  H03K19/00315

Abstract: An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.