公开(公告)号：US20130344687A1

公开(公告)日：2013-12-26

申请号：US13975491

申请日：2013-08-26

Applicant: Cree, Inc.

Inventor： Adam William Saxler ,  Yifeng Wu ,  Primit Parikh ,  Umesh Mishra ,  Richard Peter Smith ,  Scott T. Sheppard

IPC: H01L21/02

CPC classification number: H01L21/0254 ,  H01L21/0237 ,  H01L21/02425 ,  H01L21/02439 ,  H01L21/02491 ,  H01L21/02581 ,  H01L21/0262 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41766 ,  H01L29/66462 ,  H01L29/7787

Abstract: Semiconductor device structures and methods of fabricating semiconductor devices structures are provided that include a semi-insulating or insulating GaN epitaxial layer on a conductive semiconductor substrate and/or a conductive layer. The semi-insulating or insulating GaN epitaxial layer has a thickness of at least about 4 μm. GaN semiconductor device structures and methods of fabricating GaN semiconductor device structures are also provided that include an electrically conductive SiC substrate and an insulating or semi-insulating GaN epitaxial layer on the conductive SiC substrate. The GaN epitaxial layer has a thickness of at least about 4 μm. GaN semiconductor device structures and methods of fabricating GaN semiconductor device structures are also provided that include an electrically conductive GaN substrate, an insulating or semi-insulating GaN epitaxial layer on the conductive GaN substrate, a GaN based semiconductor device on the GaN epitaxial layer and a via hole and corresponding via metal in the via hole that extends through layers of the GaN based semiconductor device and the GaN epitaxial layer.

Abstract translation: 提供半导体器件结构和制造半导体器件结构的方法，其包括在导电半导体衬底和/或导电层上的半绝缘或绝缘GaN外延层。 半绝缘或绝缘GaN外延层具有至少约4μm的厚度。 还提供GaN半导体器件结构和制造GaN半导体器件结构的方法，其包括在导电SiC衬底上的导电SiC衬底和绝缘或半绝缘GaN外延层。 GaN外延层具有至少约4μm的厚度。 还提供GaN半导体器件结构和制造GaN半导体器件结构的方法，其包括导电GaN衬底，导电GaN衬底上的绝缘或半绝缘GaN外延层，GaN外延层上的GaN基半导体器件和 通孔和通孔中相应的通孔金属延伸穿过GaN基半导体器件和GaN外延层的层。

公开(公告)号：US09224596B2

公开(公告)日：2015-12-29

申请号：US13975491

申请日：2013-08-26

Applicant: Cree, Inc.

Inventor： Adam William Saxler ,  Yifeng Wu ,  Primit Parikh ,  Umesh Mishra ,  Richard Peter Smith ,  Scott T. Sheppard

IPC: H01L21/20 ,  H01L21/28 ,  H01L21/36 ,  H01L21/02 ,  H01L29/417 ,  H01L29/66 ,  H01L29/778 ,  H01L29/16 ,  H01L29/20

CPC classification number: H01L21/0254 ,  H01L21/0237 ,  H01L21/02425 ,  H01L21/02439 ,  H01L21/02491 ,  H01L21/02581 ,  H01L21/0262 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41766 ,  H01L29/66462 ,  H01L29/7787

Abstract: Semiconductor device structures and methods of fabricating semiconductor devices structures are provided that include a semi-insulating or insulating GaN epitaxial layer on a conductive semiconductor substrate and/or a conductive layer. The semi-insulating or insulating GaN epitaxial layer has a thickness of at least about 4 μm. GaN semiconductor device structures and methods of fabricating GaN semiconductor device structures are also provided that include an electrically conductive SiC substrate and an insulating or semi-insulating GaN epitaxial layer on the conductive SiC substrate. The GaN epitaxial layer has a thickness of at least about 4 μm. GaN semiconductor device structures and methods of fabricating GaN semiconductor device structures are also provided that include an electrically conductive GaN substrate, an insulating or semi-insulating GaN epitaxial layer on the conductive GaN substrate, a GaN based semiconductor device on the GaN epitaxial layer and a via hole and corresponding via metal in the via hole that extends through layers of the GaN based semiconductor device and the GaN epitaxial layer.

Abstract translation: 提供半导体器件结构和制造半导体器件结构的方法，其包括在导电半导体衬底和/或导电层上的半绝缘或绝缘GaN外延层。 半绝缘或绝缘的GaN外延层具有至少约4μm的厚度。 还提供GaN半导体器件结构和制造GaN半导体器件结构的方法，其包括在导电SiC衬底上的导电SiC衬底和绝缘或半绝缘GaN外延层。 GaN外延层具有至少约4μm的厚度。 还提供GaN半导体器件结构和制造GaN半导体器件结构的方法，其包括导电GaN衬底，导电GaN衬底上的绝缘或半绝缘GaN外延层，GaN外延层上的GaN基半导体器件和 通孔和通孔中相应的通孔金属延伸穿过GaN基半导体器件和GaN外延层的层。