公开(公告)号：US20130344687A1

公开(公告)日：2013-12-26

申请号：US13975491

申请日：2013-08-26

Applicant: Cree, Inc.

Inventor： Adam William Saxler ,  Yifeng Wu ,  Primit Parikh ,  Umesh Mishra ,  Richard Peter Smith ,  Scott T. Sheppard

IPC: H01L21/02

CPC classification number: H01L21/0254 ,  H01L21/0237 ,  H01L21/02425 ,  H01L21/02439 ,  H01L21/02491 ,  H01L21/02581 ,  H01L21/0262 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41766 ,  H01L29/66462 ,  H01L29/7787

Abstract: Semiconductor device structures and methods of fabricating semiconductor devices structures are provided that include a semi-insulating or insulating GaN epitaxial layer on a conductive semiconductor substrate and/or a conductive layer. The semi-insulating or insulating GaN epitaxial layer has a thickness of at least about 4 μm. GaN semiconductor device structures and methods of fabricating GaN semiconductor device structures are also provided that include an electrically conductive SiC substrate and an insulating or semi-insulating GaN epitaxial layer on the conductive SiC substrate. The GaN epitaxial layer has a thickness of at least about 4 μm. GaN semiconductor device structures and methods of fabricating GaN semiconductor device structures are also provided that include an electrically conductive GaN substrate, an insulating or semi-insulating GaN epitaxial layer on the conductive GaN substrate, a GaN based semiconductor device on the GaN epitaxial layer and a via hole and corresponding via metal in the via hole that extends through layers of the GaN based semiconductor device and the GaN epitaxial layer.

Abstract translation: 提供半导体器件结构和制造半导体器件结构的方法，其包括在导电半导体衬底和/或导电层上的半绝缘或绝缘GaN外延层。 半绝缘或绝缘GaN外延层具有至少约4μm的厚度。 还提供GaN半导体器件结构和制造GaN半导体器件结构的方法，其包括在导电SiC衬底上的导电SiC衬底和绝缘或半绝缘GaN外延层。 GaN外延层具有至少约4μm的厚度。 还提供GaN半导体器件结构和制造GaN半导体器件结构的方法，其包括导电GaN衬底，导电GaN衬底上的绝缘或半绝缘GaN外延层，GaN外延层上的GaN基半导体器件和 通孔和通孔中相应的通孔金属延伸穿过GaN基半导体器件和GaN外延层的层。

公开(公告)号：US09224596B2

公开(公告)日：2015-12-29

申请号：US13975491

申请日：2013-08-26

Applicant: Cree, Inc.

Inventor： Adam William Saxler ,  Yifeng Wu ,  Primit Parikh ,  Umesh Mishra ,  Richard Peter Smith ,  Scott T. Sheppard

IPC: H01L21/20 ,  H01L21/28 ,  H01L21/36 ,  H01L21/02 ,  H01L29/417 ,  H01L29/66 ,  H01L29/778 ,  H01L29/16 ,  H01L29/20

CPC classification number: H01L21/0254 ,  H01L21/0237 ,  H01L21/02425 ,  H01L21/02439 ,  H01L21/02491 ,  H01L21/02581 ,  H01L21/0262 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41766 ,  H01L29/66462 ,  H01L29/7787

Abstract: Semiconductor device structures and methods of fabricating semiconductor devices structures are provided that include a semi-insulating or insulating GaN epitaxial layer on a conductive semiconductor substrate and/or a conductive layer. The semi-insulating or insulating GaN epitaxial layer has a thickness of at least about 4 μm. GaN semiconductor device structures and methods of fabricating GaN semiconductor device structures are also provided that include an electrically conductive SiC substrate and an insulating or semi-insulating GaN epitaxial layer on the conductive SiC substrate. The GaN epitaxial layer has a thickness of at least about 4 μm. GaN semiconductor device structures and methods of fabricating GaN semiconductor device structures are also provided that include an electrically conductive GaN substrate, an insulating or semi-insulating GaN epitaxial layer on the conductive GaN substrate, a GaN based semiconductor device on the GaN epitaxial layer and a via hole and corresponding via metal in the via hole that extends through layers of the GaN based semiconductor device and the GaN epitaxial layer.

Abstract translation: 提供半导体器件结构和制造半导体器件结构的方法，其包括在导电半导体衬底和/或导电层上的半绝缘或绝缘GaN外延层。 半绝缘或绝缘的GaN外延层具有至少约4μm的厚度。 还提供GaN半导体器件结构和制造GaN半导体器件结构的方法，其包括在导电SiC衬底上的导电SiC衬底和绝缘或半绝缘GaN外延层。 GaN外延层具有至少约4μm的厚度。 还提供GaN半导体器件结构和制造GaN半导体器件结构的方法，其包括导电GaN衬底，导电GaN衬底上的绝缘或半绝缘GaN外延层，GaN外延层上的GaN基半导体器件和 通孔和通孔中相应的通孔金属延伸穿过GaN基半导体器件和GaN外延层的层。

公开(公告)号：US09142617B2

公开(公告)日：2015-09-22

申请号：US13948675

申请日：2013-07-23

Applicant: Cree, Inc.

Inventor： Adam William Saxler

IPC: H01L29/778 ,  H01L29/16 ,  H01L21/02

CPC classification number: H01L29/1602 ,  H01L21/02378 ,  H01L21/02527 ,  H01L21/0254 ,  H01L29/778

Abstract: A high power, wide-bandgap device is disclosed that exhibits reduced junction temperature and higher power density during operation and improved reliability at a rated power density. The device includes a diamond substrate for providing a heat sink with a thermal conductivity greater than silicon carbide, a single crystal silicon carbide layer on the diamond substrate for providing a supporting crystal lattice match for wide-bandgap material structures that is better than the crystal lattice match of diamond, and a Group III nitride heterostructure on the single crystal silicon carbide layer for providing device characteristics.

Abstract translation: 公开了一种高功率宽带隙器件，其在运行期间表现出降低的结温和更高的功率密度，并且在额定功率密度下具有改进的可靠性。 该器件包括用于提供热导率大于碳化硅的金刚石衬底，金刚石衬底上的单晶碳化硅层，用于为宽带隙材料结构提供支撑晶格匹配，优于晶格 在单晶碳化硅层上形成金刚石和III族氮化物异质结构，以提供器件特性。

公开(公告)号：US09054017B2

公开(公告)日：2015-06-09

申请号：US13751804

申请日：2013-01-28

Applicant: Cree, Inc.

Inventor： Adam William Saxler ,  Albert Augustus Burk, Jr.

IPC: H01L27/14 ,  H01L29/15 ,  H01L21/02

CPC classification number: H01L29/15 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/02507 ,  H01L21/0251 ,  H01L21/0254 ,  H01L21/02642

Abstract: A semiconductor structure includes a substrate, a nucleation layer on the substrate, a compositionally graded layer on the nucleation layer, and a layer of a nitride semiconductor material on the compositionally graded layer. The layer of nitride semiconductor material includes a plurality of substantially relaxed nitride interlayers spaced apart within the layer of nitride semiconductor material. The substantially relaxed nitride interlayers include aluminum and gallium and are conductively doped with an n-type dopant, and the layer of nitride semiconductor material including the plurality of nitride interlayers has a total thickness of at least about 2.0 μm.

Abstract translation: 半导体结构包括基板，基板上的成核层，成核层上的组成梯度层，以及组成梯度层上的氮化物半导体材料层。 氮化物半导体材料层包括在氮化物半导体材料层内间隔开的多个基本松弛的氮化物夹层。 基本上松弛的氮化物夹层包括铝和镓，并且导电地掺杂有n型掺杂剂，并且包括多个氮化物夹层的氮化物半导体材料层具有至少约2.0μm的总厚度。

公开(公告)号：US20130306990A1

公开(公告)日：2013-11-21

申请号：US13948675

申请日：2013-07-23

Applicant: Cree, Inc.

Inventor： Adam William Saxler

IPC: H01L29/16 ,  H01L29/778

CPC classification number: H01L29/1602 ,  H01L21/02378 ,  H01L21/02527 ,  H01L21/0254 ,  H01L29/778

Abstract: A high power, wide-bandgap device is disclosed that exhibits reduced junction temperature and higher power density during operation and improved reliability at a rated power density. The device includes a diamond substrate for providing a heat sink with a thermal conductivity greater than silicon carbide, a single crystal silicon carbide layer on the diamond substrate for providing a supporting crystal lattice match for wide-bandgap material structures that is better than the crystal lattice match of diamond, and a Group III nitride heterostructure on the single crystal silicon carbide layer for providing device characteristics.

Abstract translation: 公开了一种高功率宽带隙器件，其在运行期间表现出降低的结温和更高的功率密度，并且在额定功率密度下具有改进的可靠性。 该器件包括用于提供热导率大于碳化硅的金刚石衬底，金刚石衬底上的单晶碳化硅层，用于为宽带隙材料结构提供支撑晶格匹配，优于晶格 在单晶碳化硅层上形成金刚石和III族氮化物异质结构，以提供器件特性。

公开(公告)号：US20130221327A1

公开(公告)日：2013-08-29

申请号：US13751804

申请日：2013-01-28

Applicant: Cree, Inc.

Inventor： Adam William Saxler ,  Albert Augustus Burk, JR.

IPC: H01L29/15 ,  H01L21/02

CPC classification number: H01L29/15 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/02507 ,  H01L21/0251 ,  H01L21/0254 ,  H01L21/02642

Abstract: A semiconductor structure includes a substrate, a nucleation layer on the substrate, a compositionally graded layer on the nucleation layer, and a layer of a nitride semiconductor material on the compositionally graded layer. The layer of nitride semiconductor material includes a plurality of substantially relaxed nitride interlayers spaced apart within the layer of nitride semiconductor material. The substantially relaxed nitride interlayers include aluminum and gallium and are conductively doped with an n-type dopant, and the layer of nitride semiconductor material including the plurality of nitride interlayers has a total thickness of at least about 2.0 μm.

Abstract translation: 半导体结构包括基板，基板上的成核层，成核层上的组成梯度层，以及组成梯度层上的氮化物半导体材料层。 氮化物半导体材料层包括在氮化物半导体材料层内间隔开的多个基本松弛的氮化物夹层。 基本上松弛的氮化物夹层包括铝和镓，并且导电地掺杂有n型掺杂剂，并且包括多个氮化物夹层的氮化物半导体材料层具有至少约2.0μm的总厚度。