Monolithic microwave integrated circuits having both enhancement-mode and depletion mode transistors

    公开(公告)号:US11594628B2

    公开(公告)日:2023-02-28

    申请号:US17111561

    申请日:2020-12-04

    申请人: Cree, Inc.

    摘要: A gallium nitride based monolithic microwave integrated circuit includes a substrate, a channel layer on the substrate and a barrier layer on the channel layer. A recess is provided in a top surface of the barrier layer. First gate, source and drain electrodes are provided on the barrier layer opposite the channel layer, with a bottom surface of the first gate electrode in direct contact with the barrier layer. Second gate, source and drain electrodes are also provided on the barrier layer opposite the channel layer. A gate insulating layer is provided in the recess in the barrier layer, and the second gate electrode is on the gate insulating layer opposite the barrier layer and extending into the recess. The first gate, source and drain electrodes comprise the electrodes of a depletion mode transistor, and the second gate, source and drain electrodes comprise the electrodes of an enhancement mode transistor.

    FIELD EFFECT TRANSISTOR WITH ENHANCED RELIABILITY

    公开(公告)号:US20220130985A1

    公开(公告)日:2022-04-28

    申请号:US17325576

    申请日:2021-05-20

    申请人: Cree, Inc.

    摘要: A transistor device includes a semiconductor epitaxial layer structure including a channel layer and a barrier layer on the channel layer, a source contact and a drain contact on the barrier layer, an insulating layer on the semiconductor layer between the source contact and the drain contact, and a gate contact on the insulating layer. The gate contact includes a central portion that extends through the insulating layer and contacts the barrier layer and a drain side wing that extends laterally from the central portion of the gate toward the drain contact by a distance ΓD. The drain side wing of the gate contact is spaced apart from the barrier layer by a distance d1 that is equal to a thickness of the insulating layer. The distance ΓD is less than about 0.3 μm, and the distance d1 is less than about 80 nm.

    Monolithic microwave integrated circuits having both enhancement-mode and depletion mode transistors

    公开(公告)号:US10861963B2

    公开(公告)日:2020-12-08

    申请号:US16663843

    申请日:2019-10-25

    申请人: Cree, Inc.

    摘要: A gallium nitride based monolithic microwave integrated circuit includes a substrate, a channel layer on the substrate and a barrier layer on the channel layer. A recess is provided in a top surface of the barrier layer. First gate, source and drain electrodes are provided on the barrier layer opposite the channel layer, with a bottom surface of the first gate electrode in direct contact with the barrier layer. Second gate, source and drain electrodes are also provided on the barrier layer opposite the channel layer. A gate insulating layer is provided in the recess in the barrier layer, and the second gate electrode is on the gate insulating layer opposite the barrier layer and extending into the recess. The first gate, source and drain electrodes comprise the electrodes of a depletion mode transistor, and the second gate, source and drain electrodes comprise the electrodes of an enhancement mode transistor.

    MONOLITHIC MICROWAVE INTEGRATED CIRCUITS HAVING BOTH ENHANCEMENT-MODE AND DEPLETION MODE TRANSISTORS

    公开(公告)号:US20200066892A1

    公开(公告)日:2020-02-27

    申请号:US16663843

    申请日:2019-10-25

    申请人: Cree, Inc.

    摘要: A gallium nitride based monolithic microwave integrated circuit includes a substrate, a channel layer on the substrate and a barrier layer on the channel layer. A recess is provided in a top surface of the barrier layer. First gate, source and drain electrodes are provided on the barrier layer opposite the channel layer, with a bottom surface of the first gate electrode in direct contact with the barrier layer. Second gate, source and drain electrodes are also provided on the barrier layer opposite the channel layer. A gate insulating layer is provided in the recess in the barrier layer, and the second gate electrode is on the gate insulating layer opposite the barrier layer and extending into the recess. The first gate, source and drain electrodes comprise the electrodes of a depletion mode transistor, and the second gate, source and drain electrodes comprise the electrodes of an enhancement mode transistor.

    Schottky Diodes Including Polysilicon Having Low Barrier Heights
    7.
    发明申请
    Schottky Diodes Including Polysilicon Having Low Barrier Heights 审中-公开
    包括具有低阻挡高度的多晶硅的肖特基二极管

    公开(公告)号:US20130043491A1

    公开(公告)日:2013-02-21

    申请号:US13652754

    申请日:2012-10-16

    申请人: Cree, Inc.

    IPC分类号: H01L29/872

    摘要: Hybrid semiconductor devices including a PIN diode portion and a Schottky diode portion are provided. The PIN diode portion is provided on a semiconductor substrate and has an anode contact on a first surface of the semiconductor substrate. The Schottky diode portion is also provided on the semiconductor substrate and includes a polysilicon layer on the semiconductor substrate and a ohmic contact on the polysilicon layer. Related Schottky diodes are also provided herein.

    摘要翻译: 提供了包括PIN二极管部分和肖特基二极管部分的混合半导体器件。 PIN二极管部分设置在半导体衬底上,并且在半导体衬底的第一表面上具有阳极接触。 肖特基二极管部分也设置在半导体衬底上并且包括在半导体衬底上的多晶硅层和多晶硅层上的欧姆接触。 本文还提供了相关的肖特基二极管。