公开(公告)号：US20160329900A1

公开(公告)日：2016-11-10

申请号：US14670295

申请日：2015-03-26

Applicant: Cypress Semiconductor Corporation

Inventor： Eashwar Thiagarajan ,  Harold M. Kutz ,  Hans Klein ,  Jaskarn Singh Johal ,  Jean-Paul Vanitegem ,  Kendall V. Castor-Perry ,  Mark E. Hastings ,  Amsby D. Richardson, JR. ,  Anasuya Pai Maroor ,  Ata Khan ,  Dennis R. Seguine ,  Onur Ozbek ,  Carl Ferdinand Liepold

IPC: H03K19/177

CPC classification number: H03K19/17736 ,  H03K19/17712 ,  H03K19/17732

Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.

Abstract translation: 集成电路（IC）装置可以包括多个模拟块，包括至少一个固定功能模拟电路，多个可重新配置的模拟电路块，至少一个模拟路由块可重构以提供任何模拟块之间的信号路径; 以及包括数字电路的数字部分; 其中每个模拟块包括耦合到所述至少一个模拟路由块的专用信号线。

公开(公告)号：US20170085268A1

公开(公告)日：2017-03-23

申请号：US15269479

申请日：2016-09-19

Applicant: Cypress Semiconductor Corporation

Inventor： Eashwar Thiagarajan ,  Harold M. Kutz ,  Hans Klein ,  Jaskarn Singh Johal ,  Jean-Paul Vanitegem ,  Kendall V. Castor-Perry ,  Mark Hastings ,  Amsby D. Richardson, JR. ,  Anasuya Pai Maroor ,  Ata Khan ,  Dennis R. Seguine ,  Carl Ferdinand Liepold ,  Onur Ozbek

IPC: H03K19/177

CPC classification number: H03K19/17736 ,  H03K19/17712 ,  H03K19/17732

Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.

公开(公告)号：US20210409034A1

公开(公告)日：2021-12-30

申请号：US17072697

申请日：2020-10-16

Applicant: Cypress Semiconductor Corporation

Inventor： Eashwar Thiagarajan ,  Erhan Hancioglu ,  Eric N. Mann ,  Harold Kutz ,  Amsby D. Richardson, JR. ,  Rajiv Singh

IPC: H03M1/18 ,  H03G3/30

Abstract: A method can include modulating an amplified analog signal into a digital data stream, filtering the digital data stream with a first filter, generating gain control values associated with amplified analog signal based on the filtered data stream with the first filter and filtering the digital data stream with a second filter, and generating output digital values associated with the amplified analog signal based on the filtered data stream with the second filter. Corresponding systems and devices are also disclosed.

公开(公告)号：US20160065216A1

公开(公告)日：2016-03-03

申请号：US14668984

申请日：2015-03-26

Applicant: Cypress Semiconductor Corporation

Inventor： Eashwar Thiagarajan ,  Harold M. Kutz ,  Hans Klein ,  Jaskarn Singh Johal ,  Jean-Paul Vanitegem ,  Kendall V. Castor-Perry ,  Mark E. Hastings ,  Amsby D. Richardson, JR. ,  Anasuya Pai Maroor ,  Ata Khan ,  Dennis R. Seguine ,  Bruce E. Byrkett ,  Carl Ferdinand Liepold ,  Hans Van Antwerpen

IPC: H03K19/0175 ,  H03M1/38 ,  H03K19/003 ,  H03K19/00

CPC classification number: H03K19/017581 ,  H03K19/0005 ,  H03K19/00346 ,  H03K19/02 ,  H03M1/1205 ,  H03M1/38

Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, and at least one reconfigurable analog circuit block selected from: a continuous time (CT) block comprising a plurality of reconfigurable amplifier circuits and a discrete time block comprising amplifiers with a reconfigurable switch network; an analog multiplexer (MUX) configured to selectively connect any of a plurality of input/outputs (I/Os) of the IC device to the analog blocks, the analog MUX including at least one low noise signal path pair having a lower resistance than other signal paths of the analog MUX; at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; a digital section comprising digital circuits; and a processor interface coupled to the analog blocks.

Abstract translation: 集成电路（IC）装置可以包括多个模拟块，包括至少一个固定功能的模拟电路和至少一个可重新配置的模拟电路块，所述至少一个可重新配置的模拟电路块选自：包括多个可重新配置的放大器电路的连续时间（CT） 离散时间块，包括具有可重新配置的交换网络的放大器; 模拟多路复用器（MUX）被配置为选择性地将IC器件的多个输入/输出（I / O）中的任一个连接到模拟块，模拟MUX包括至少一个具有比其他电阻低的电阻的低噪声信号路径对 模拟MUX的信号路径; 至少一个模拟路由块可重新配置以提供任何模拟块之间的信号路径; 包括数字电路的数字部分; 以及耦合到模拟块的处理器接口。