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公开(公告)号：US11105851B2
公开(公告)日：2021-08-31
申请号：US16821555
申请日：2020-03-17
Applicant: Cypress Semiconductor Corporation
Inventor： Harold Kutz , Timothy John Williams , Bert Sullam , Warren S. Snyder , James H. Shutt , Bruce E. Byrkett , Monte Mar , Eashwar Thiagarajan , Nathan Wayne Kohagen , David G. Wright , Mark E Hastings , Dennis R. Seguine
IPC: G01R31/3177 , G06F13/28 , H03K19/173 , G01R31/317
Abstract: A microcontroller comprises a plurality of digital peripheral blocks and a direct memory access (DMA) controller coupled thereto. The plurality of digital peripheral blocks includes a digital peripheral block that is configured to issue a DMA request. Upon receipt of the DMA request, the DMA controller is configured to retrieve configuration information and to write the configuration information to a configuration register associated with a circuit element of the microcontroller.
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公开(公告)号：US20200373923A1
公开(公告)日：2020-11-26
申请号：US16721222
申请日：2019-12-19
Applicant: Cypress Semiconductor Corporation
Inventor： Paul M. Walsh , Dermot MacSweeney , Daniel O'Keeffe , Kofi Makinwa , Matheus Pimenta , Dennis R. Seguine , Çagri Gürleyük
Abstract: Maintaining a fixed frequency in a resonant circuit of an inductive sensor circuit is described. In one embodiment, an apparatus includes an inductance-to-digital converter (LDC). The LDC includes a digital filter to measure an inductance change of a sensor and convert the inductance change to a digital value. The LDC further includes a digital control loop to maintain a fixed frequency in the sensor. The sensor forms an oscillator in the digital control loop. An output of the digital control loop is representative of the inductance change of the sensor.
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公开(公告)号：US20180292454A1
公开(公告)日：2018-10-11
申请号：US15944244
申请日：2018-04-03
Applicant: Cypress Semiconductor Corporation
Inventor： Harold M. Kutz , Timothy John Williams , Bert S. Sullam , Warren S. Snyder , James H. Shutt , Bruce E. Byrkett , Monte Mar , Eashwar Thiagarajan , Nathan Wayne Kohagen , David G. Wright , Mark E Hastings , Dennis R. Seguine
IPC: G01R31/3177 , G06F13/28 , H03K19/173 , G01R31/317
CPC classification number: G01R31/3177 , G01R31/31721 , G06F13/28 , H03K19/173
Abstract: A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manger coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a lower power mode.
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公开(公告)号：US09960773B2
公开(公告)日：2018-05-01
申请号：US15269479
申请日：2016-09-19
Applicant: Cypress Semiconductor Corporation
Inventor： Eashwar Thiagarajan , Harold M. Kutz , Hans Klein , Jaskarn Singh Johal , Jean-Paul Vanitegem , Kendall V. Castor-Perry , Mark Hastings , Amsby D. Richardson, Jr. , Anasuya Pai Maroor , Ata Khan , Dennis R. Seguine , Carl Ferdinand Liepold , Onur Ozbek
IPC: H03K19/177
CPC classification number: H03K19/17736 , H03K19/17712 , H03K19/17732
Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.
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公开(公告)号：US20160065216A1
公开(公告)日：2016-03-03
申请号：US14668984
申请日：2015-03-26
Applicant: Cypress Semiconductor Corporation
Inventor： Eashwar Thiagarajan , Harold M. Kutz , Hans Klein , Jaskarn Singh Johal , Jean-Paul Vanitegem , Kendall V. Castor-Perry , Mark E. Hastings , Amsby D. Richardson, JR. , Anasuya Pai Maroor , Ata Khan , Dennis R. Seguine , Bruce E. Byrkett , Carl Ferdinand Liepold , Hans Van Antwerpen
IPC: H03K19/0175 , H03M1/38 , H03K19/003 , H03K19/00
CPC classification number: H03K19/017581 , H03K19/0005 , H03K19/00346 , H03K19/02 , H03M1/1205 , H03M1/38
Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, and at least one reconfigurable analog circuit block selected from: a continuous time (CT) block comprising a plurality of reconfigurable amplifier circuits and a discrete time block comprising amplifiers with a reconfigurable switch network; an analog multiplexer (MUX) configured to selectively connect any of a plurality of input/outputs (I/Os) of the IC device to the analog blocks, the analog MUX including at least one low noise signal path pair having a lower resistance than other signal paths of the analog MUX; at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; a digital section comprising digital circuits; and a processor interface coupled to the analog blocks.
Abstract translation: 集成电路（IC）装置可以包括多个模拟块，包括至少一个固定功能的模拟电路和至少一个可重新配置的模拟电路块，所述至少一个可重新配置的模拟电路块选自：包括多个可重新配置的放大器电路的连续时间（CT） 离散时间块，包括具有可重新配置的交换网络的放大器; 模拟多路复用器（MUX）被配置为选择性地将IC器件的多个输入/输出（I / O）中的任一个连接到模拟块，模拟MUX包括至少一个具有比其他电阻低的电阻的低噪声信号路径对 模拟MUX的信号路径; 至少一个模拟路由块可重新配置以提供任何模拟块之间的信号路径; 包括数字电路的数字部分; 以及耦合到模拟块的处理器接口。
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Patent Agency Ranking
公开(公告)号：US20180164358A1
公开(公告)日：2018-06-14
申请号：US15860432
申请日：2018-01-02
Applicant: Cypress Semiconductor Corporation
Inventor： Dennis R. Seguine
Abstract: One embodiment includes and I/0 bus including a signal line coupled to a signal source and multiple line switches, each line switch to couple a corresponding I/0 port to the signal line. Switch logic coupled to the I/0 bus may programmatically switch the multiple line switches to couple at least one of the signal source and measurement circuitry to the respective I/0 port.
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公开(公告)号：US20170085268A1
公开(公告)日：2017-03-23
申请号：US15269479
申请日：2016-09-19
Applicant: Cypress Semiconductor Corporation
Inventor： Eashwar Thiagarajan , Harold M. Kutz , Hans Klein , Jaskarn Singh Johal , Jean-Paul Vanitegem , Kendall V. Castor-Perry , Mark Hastings , Amsby D. Richardson, JR. , Anasuya Pai Maroor , Ata Khan , Dennis R. Seguine , Carl Ferdinand Liepold , Onur Ozbek
IPC: H03K19/177
CPC classification number: H03K19/17736 , H03K19/17712 , H03K19/17732
Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.
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公开(公告)号：US09473144B1
公开(公告)日：2016-10-18
申请号：US14670295
申请日：2015-03-26
Applicant: Cypress Semiconductor Corporation
Inventor： Eashwar Thiagarajan , Harold M. Kutz , Hans Klein , Jaskarn Singh Johal , Jean-Paul Vanitegem , Kendall V. Castor-Perry , Mark E. Hastings , Amsby D. Richardson, Jr. , Anasuya Pai Maroor , Ata Khan , Dennis R. Seguine , Onur Ozbek , Carl Ferdinand Liepold
IPC: H03K19/177
CPC classification number: H03K19/17736 , H03K19/17712 , H03K19/17732
Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.
Abstract translation: 集成电路（IC）装置可以包括多个模拟块，包括至少一个固定功能模拟电路，多个可重新配置的模拟电路块，至少一个模拟路由块可重构以提供任何模拟块之间的信号路径; 以及包括数字电路的数字部分; 其中每个模拟块包括耦合到所述至少一个模拟路由块的专用信号线。
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公开(公告)号：US11552635B2
公开(公告)日：2023-01-10
申请号：US16721222
申请日：2019-12-19
Applicant: Cypress Semiconductor Corporation
Inventor： Paul M. Walsh , Dermot MacSweeney , Daniel O'Keeffe , Kofi Makinwa , Matheus Pimenta , Dennis R. Seguine , Ça{hacek over (g)}ri Gürleyük
Abstract: One inductive sensor is configured to maintain a fixed frequency in a resonant circuit. One apparatus includes an inductance-to-digital converter (LDC). The LDC includes a digital filter to measure an inductance change of a sensor and convert the inductance change to a digital value. The LDC further includes a digital control loop to maintain a fixed frequency in the sensor. The sensor forms an oscillator in the digital control loop. An output of the digital control loop is representative of the inductance change of the sensor.
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公开(公告)号：US20210096164A1
公开(公告)日：2021-04-01
申请号：US16993048
申请日：2020-08-13
Applicant: Cypress Semiconductor Corporation
Inventor： Dennis R. Seguine
Abstract: One embodiment includes and I/0 bus including a signal line coupled to a signal source and multiple line switches, each line switch to couple a corresponding I/0 port to the signal line. Switch logic coupled to the I/0 bus may programmatically switch the multiple line switches to couple at least one of the signal source and measurement circuitry to the respective I/0 port.
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