公开(公告)号：US20240385139A1

公开(公告)日：2024-11-21

申请号：US18320022

申请日：2023-05-18

Applicant: Cypress Semiconductor Corporation

Inventor： Eashwar Thiagarajan ,  Ding Ma ,  Nidhin Mulangattil Sudhakaran ,  Andrew Page ,  Bert Sullam

IPC: G01N27/403 ,  G01N27/416

Abstract: One or more computing devices, systems, and/or methods are provided. In an example of the techniques presented herein, a method is provided. The method includes connecting a first programmable electrode interface to one of a first working electrode, a control electrode, a reference electrode, or a guard electrode of an electrochemical cell in a first configuration, and connecting the first programmable electrode interface to a different one of the first working electrode, the control electrode, the reference electrode, or the guard electrode in a second configuration.

公开(公告)号：US11251805B2

公开(公告)日：2022-02-15

申请号：US17072697

申请日：2020-10-16

Applicant: Cypress Semiconductor Corporation

Inventor： Eashwar Thiagarajan ,  Erhan Hancioglu ,  Eric N. Mann ,  Harold Kutz ,  Amsby D Richardson, Jr. ,  Rajiv Singh

IPC: H03M1/00 ,  H03M1/18 ,  H03G3/30

Abstract: A method can include modulating an amplified analog signal into a digital data stream, filtering the digital data stream with a first filter, generating gain control values associated with amplified analog signal based on the filtered data stream with the first filter and filtering the digital data stream with a second filter, and generating output digital values associated with the amplified analog signal based on the filtered data stream with the second filter. Corresponding systems and devices are also disclosed.

公开(公告)号：US10033403B1

公开(公告)日：2018-07-24

申请号：US14736488

申请日：2015-06-11

Applicant: Cypress Semiconductor Corporation

Inventor： Eashwar Thiagarajan ,  Jean-Paul Vanitegem ,  Harold M. Kutz ,  Anasuya Pai Maroor ,  Kendall V. Castor-Perry

IPC: H03M3/00 ,  H03H17/04 ,  H03H17/06

Abstract: An integrated circuit device can include at least one input; at least one output configured to provide a multi-bit output value; at least one input; at least one output configured to provide a multi-bit output value; a plurality of configurable digital filter circuits; and switch circuits coupled to the at least one input and to the at least one output, the switch circuits configurable to connect same digital filter circuits as a single processing path or separate processing paths.

公开(公告)号：US09880536B1

公开(公告)日：2018-01-30

申请号：US14865824

申请日：2015-09-25

Applicant: Cypress Semiconductor Corporation

Inventor： Bert S. Sullam ,  Harold M. Kutz ,  Monte Mar ,  Eashwar Thiagarajan ,  Timothy Williams ,  David G. Wright

IPC: G06F15/177 ,  G05B19/042 ,  H04L29/08 ,  H04L29/06

CPC classification number: G05B19/042 ,  G05B2219/25257 ,  G06F15/7867 ,  H04L29/06 ,  H04L29/08981 ,  H04L2025/0342

Abstract: A programmable system includes a programmable analog system that is reconfigurable to perform various analog operations, and includes a programmable digital system that is reconfigurable to perform various digital operations. The programmable system also includes a microcontroller capable of reconfiguring and controlling the programmable analog system and the programmable digital system. The programmable digital system is configured to control the programmable analog system autonomously of the microcontroller.

公开(公告)号：US20170085268A1

公开(公告)日：2017-03-23

申请号：US15269479

申请日：2016-09-19

Applicant: Cypress Semiconductor Corporation

Inventor： Eashwar Thiagarajan ,  Harold M. Kutz ,  Hans Klein ,  Jaskarn Singh Johal ,  Jean-Paul Vanitegem ,  Kendall V. Castor-Perry ,  Mark Hastings ,  Amsby D. Richardson, JR. ,  Anasuya Pai Maroor ,  Ata Khan ,  Dennis R. Seguine ,  Carl Ferdinand Liepold ,  Onur Ozbek

IPC: H03K19/177

CPC classification number: H03K19/17736 ,  H03K19/17712 ,  H03K19/17732

Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.

公开(公告)号：US09473144B1

公开(公告)日：2016-10-18

申请号：US14670295

申请日：2015-03-26

Applicant: Cypress Semiconductor Corporation

Inventor： Eashwar Thiagarajan ,  Harold M. Kutz ,  Hans Klein ,  Jaskarn Singh Johal ,  Jean-Paul Vanitegem ,  Kendall V. Castor-Perry ,  Mark E. Hastings ,  Amsby D. Richardson, Jr. ,  Anasuya Pai Maroor ,  Ata Khan ,  Dennis R. Seguine ,  Onur Ozbek ,  Carl Ferdinand Liepold

IPC: H03K19/177

CPC classification number: H03K19/17736 ,  H03K19/17712 ,  H03K19/17732

Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.

Abstract translation: 集成电路（IC）装置可以包括多个模拟块，包括至少一个固定功能模拟电路，多个可重新配置的模拟电路块，至少一个模拟路由块可重构以提供任何模拟块之间的信号路径; 以及包括数字电路的数字部分; 其中每个模拟块包括耦合到所述至少一个模拟路由块的专用信号线。

公开(公告)号：US08890600B1

公开(公告)日：2014-11-18

申请号：US13893201

申请日：2013-05-13

Applicant: Cypress Semiconductor Corporation

Inventor： Timothy J. Williams ,  Harold Kutz ,  David G. Wright ,  Eashwar Thiagarajan ,  Warren S. Snyder ,  Mark E. Hastings

IPC: H03L5/00

CPC classification number: G06F13/4022 ,  H03K19/1732

Abstract: A programmable device, having an analog component coupled with an analog bus and a digital component coupled with a digital bus together with a set of IO pads, each of which capable of being coupled to a bus line of one segment of the analog bus as well as to at least one digital bus line, and where the analog bus is capable of being used to connect a pair of the IO pads to each other.

Abstract translation: 一种可编程器件，具有与模拟总线耦合的模拟部件和与数字总线耦合的数字部件以及一组IO焊盘，每组IO能够耦合到模拟总线的一个部分的总线上 关于至少一个数字总线，并且其中模拟总线能够用于将一对IO焊盘彼此连接。

公开(公告)号：US20230055860A1

公开(公告)日：2023-02-23

申请号：US17901654

申请日：2022-09-01

Applicant: Cypress Semiconductor Corporation

Inventor： Erhan Hancioglu ,  Eashwar Thiagarajan ,  Eric Mann ,  Harold Kutz ,  Vaibhav Ramamoorthy ,  Rajiv Singh ,  Amsby Richardson, JR.

IPC: H03F3/387 ,  H03M3/00

Abstract: An integrated circuit can include an amplifier coupled to receive an analog input signal, an anti-aliasing filter (AAF) coupled to an output of the amplifier, a buffer circuit coupled to an output of the AAF, a sigma-delta modulator configured to generate a digital data stream in response to an output of the buffer, and a plurality of chopping circuits nested within one another, including a first pair of chopping circuits having at least the amplifier disposed therebetween and configured to remove offset in the analog input signal, and a second pair of chopping circuit having at least the first pair of chopping circuits disposed therebetween. The amplifier, AAF, sigma-delta modulator, and chopping circuits can be formed with the same integrated circuit substrate. Corresponding methods and systems are also disclosed.

公开(公告)号：US11437961B2

公开(公告)日：2022-09-06

申请号：US16913130

申请日：2020-06-26

Applicant: Cypress Semiconductor Corporation

Inventor： Erhan Hancioglu ,  Eashwar Thiagarajan ,  Eric Mann ,  Harold Kutz ,  Vaibhav Ramamoorthy ,  Rajiv Singh ,  Amsby Richardson, Jr.

IPC: H03F1/02 ,  H03F3/387 ,  H03M3/00

Abstract: An integrated circuit can include an amplifier coupled to receive an analog input signal, an anti-aliasing filter (AAF) coupled to an output of the amplifier, a buffer circuit coupled to an output of the AAF, a sigma-delta modulator configured to generate a digital data stream in response to an output of the buffer, and a plurality of chopping circuits nested within one another, including a first pair of chopping circuits having at least the amplifier disposed therebetween and configured to remove offset in the analog input signal, and a second pair of chopping circuit having at least the first pair of chopping circuits disposed therebetween. The amplifier, AAF, sigma-delta modulator, and chopping circuits can be formed with the same integrated circuit substrate. Corresponding methods and systems are also disclosed.

公开(公告)号：US20210409034A1

公开(公告)日：2021-12-30

申请号：US17072697

申请日：2020-10-16

Applicant: Cypress Semiconductor Corporation

Inventor： Eashwar Thiagarajan ,  Erhan Hancioglu ,  Eric N. Mann ,  Harold Kutz ,  Amsby D. Richardson, JR. ,  Rajiv Singh

IPC: H03M1/18 ,  H03G3/30

Abstract: A method can include modulating an amplified analog signal into a digital data stream, filtering the digital data stream with a first filter, generating gain control values associated with amplified analog signal based on the filtered data stream with the first filter and filtering the digital data stream with a second filter, and generating output digital values associated with the amplified analog signal based on the filtered data stream with the second filter. Corresponding systems and devices are also disclosed.