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公开(公告)号:US10923601B2
公开(公告)日:2021-02-16
申请号:US15949328
申请日:2018-04-10
发明人: Chun Chen , Shenqing Fang , Unsoon Kim , Mark T. Ramsbey , Kuo Tung Chang , Sameer S. Haddad
IPC分类号: H01L27/105 , H01L27/108 , H01L29/792 , H01L27/11573 , H01L29/423 , H01L29/66
摘要: A split gate device that includes a memory gate and a select gate disposed side by side, a dielectric structure having a first portion disposed between the memory gate and a substrate and a second portion disposed along an inner sidewall of the select gate to separate the select gate from the memory gate, and a spacer formed over the select gate along an inner sidewall of the memory gate. Other embodiments of embedded split gate devices including high voltage and low voltage transistors are also disclosed.
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公开(公告)号:US20160218227A1
公开(公告)日:2016-07-28
申请号:US15046160
申请日:2016-02-17
发明人: Shenqing Fang , Chun CHEN , David Matsumoto , Mark T. Ramsbey
IPC分类号: H01L29/792 , H01L21/321 , H01L27/115 , H01L29/51 , H01L29/423 , H01L29/66 , H01L21/28 , H01L21/3213
CPC分类号: H01L29/792 , H01L21/32115 , H01L21/3212 , H01L21/32135 , H01L27/11568 , H01L29/40117 , H01L29/42344 , H01L29/513 , H01L29/517 , H01L29/66833 , H01L29/7831
摘要: Semiconductor devices and methods of producing the devices are disclosed. The devices are formed by forming a gate structure on a substrate. The gate structure includes a charge trapping dielectric formed between the substrate and a first poly layer. A top dielectric is formed over the poly layer and a sidewall dielectric is formed on a side of the poly layer. A second poly layer is formed over the gate structure such that a portion of the second poly layer includes a vertical portion that is in contact with the sidewall dielectric and a top portion that is in contact with the top dielectric. The top portion of the second poly layer can then be removed through, for instance, planarization.
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公开(公告)号:US20210091198A1
公开(公告)日:2021-03-25
申请号:US17039603
申请日:2020-09-30
发明人: Shenqing Fang , Chun Chen , Unsoon KIM , Mark T. Ramsbey , Kuo Tung Chang , Sameer S. HADDAD , James Pak
IPC分类号: H01L29/423 , H01L29/51 , H01L29/792 , H01L29/49 , H01L29/788 , H01L29/66 , H01L21/02 , H01L21/28 , H01L27/11568 , H01L27/11573 , H01L49/02
摘要: A semiconductor device and method of making the same are disclosed. The semiconductor device includes a memory gate on a charge storage structure formed on a substrate, a select gate on a gate dielectric on the substrate proximal to the memory gate, and a dielectric structure between the memory gate and the select gate, and adjacent to sidewalls of the memory gate and the select gate, wherein the memory gate and the select gate are separated by a thickness of the dielectric structure. Generally, the dielectric structure comprises multiple dielectric layers including a first dielectric layer adjacent the sidewall of the memory gate, and a nitride dielectric layer adjacent to the first dielectric layer and between the memory gate and the select gate. Other embodiments are also disclosed.
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公开(公告)号:US09966477B2
公开(公告)日:2018-05-08
申请号:US13715185
申请日:2012-12-14
发明人: Chun Chen , Shenqing Fang , Unsoon Kim , Mark T. Ramsbey , Kuo Tung Chang , Sameer S. Haddad
IPC分类号: H01L29/792 , H01L27/11573 , H01L29/423 , H01L29/66
CPC分类号: H01L29/792 , H01L27/11573 , H01L29/42344 , H01L29/66833
摘要: Embodiments provide a split gate device, methods for fabricating a split gate device, and integrated methods for fabricating a split gate device and a periphery device. In an embodiment, the split gate device is a charge trapping split gate device, which includes a charge trapping layer. In another embodiment, the split gate device is a non-volatile memory cell, which can be formed according to embodiments as standalone or embedded with a periphery device.
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公开(公告)号:US11342429B2
公开(公告)日:2022-05-24
申请号:US17039603
申请日:2020-09-30
发明人: Shenqing Fang , Chun Chen , Unsoon Kim , Mark T. Ramsbey , Kuo Tung Chang , Sameer S. Haddad , James Pak
IPC分类号: H01L29/66 , H01L29/423 , H01L29/51 , H01L29/792 , H01L29/49 , H01L29/788 , H01L21/02 , H01L21/28 , H01L27/11568 , H01L27/11573 , H01L49/02
摘要: A semiconductor device and method of making the same are disclosed. The semiconductor device includes a memory gate on a charge storage structure formed on a substrate, a select gate on a gate dielectric on the substrate proximal to the memory gate, and a dielectric structure between the memory gate and the select gate, and adjacent to sidewalls of the memory gate and the select gate, wherein the memory gate and the select gate are separated by a thickness of the dielectric structure. Generally, the dielectric structure comprises multiple dielectric layers including a first dielectric layer adjacent the sidewall of the memory gate, and a nitride dielectric layer adjacent to the first dielectric layer and between the memory gate and the select gate. Other embodiments are also disclosed.
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公开(公告)号:US20180323314A1
公开(公告)日:2018-11-08
申请号:US15949328
申请日:2018-04-10
发明人: Chun Chen , Shenqing Fang , Unsoon KIM , Mark T. Ramsbey , Kuo Tung Chang , Sameer S. HADDAD
IPC分类号: H01L29/792 , H01L29/66 , H01L27/11573 , H01L29/423
CPC分类号: H01L29/792 , H01L27/11573 , H01L29/42344 , H01L29/66833
摘要: A split gate device that includes a memory gate and a select gate disposed side by side, a dielectric structure having a first portion disposed between the memory gate and a substrate and a second portion disposed along an inner sidewall of the select gate to separate the select gate from the memory gate, and a spacer formed over the select gate along an inner sidewall of the memory gate. Other embodiments of embedded split gate devices including high voltage and low voltage transistors are also disclosed.
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