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1.
公开(公告)号:US20240235004A1
公开(公告)日:2024-07-11
申请号:US18282394
申请日:2022-03-16
Applicant: DAI NIPPON PRINTING CO., LTD.
Inventor: Kazuki KINOSHITA , Shotaro HOSODA , Hidetoshi IIOKA , Keita IIMURA , Shuji KAWAGUCHI , Masashi SAKAKI , Seiji TAKE
CPC classification number: H01Q1/22 , H01Q1/38 , H05K1/0274 , H05K3/386 , H10K59/95 , H05K3/067 , H05K2201/09245 , H05K2201/10098 , H05K2201/10128
Abstract: A wiring board includes a substrate that has transparency, a primer layer provided on the substrate, and a mesh wiring layer that is disposed on the primer layer and that includes a plurality of first-direction wiring lines and a plurality of second-direction wiring lines that interconnect the plurality of first-direction wiring lines. The primer layer includes a polymer material. At intersections of the first-direction wiring lines and the second-direction wiring lines, at least one corner portion of four corner portions formed between the first-direction wiring lines and the second-direction wiring lines is rounded in plan view.
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公开(公告)号:US20240188227A1
公开(公告)日:2024-06-06
申请号:US18285989
申请日:2022-04-04
Applicant: DAI NIPPON PRINTING CO., LTD.
Inventor: Keita IIMURA , Shuji KAWAGUCHI , Kazuki KINOSHITA , Hidetoshi IIOKA , Seiji TAKE
CPC classification number: H05K3/4602 , H05K1/0298 , H05K3/4652 , H05K2201/09781
Abstract: A wiring board includes: a substrate having transparency; a mesh wiring portion arranged on the substrate and including a plurality of wiring lines; and a dummy wiring portion arranged around the mesh wiring portion and including a plurality of dummy wiring lines electrically independent of the wiring lines. The mesh wiring portion is comprised of an iterative array of a predetermined unit pattern in a first direction. In the first direction, a gap between the mesh wiring portion and the dummy wiring portion is 0.01 times or more and 0.2 times or less a pitch of the unit pattern in the first direction.
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公开(公告)号:US20240121999A1
公开(公告)日:2024-04-11
申请号:US18285902
申请日:2022-04-04
Applicant: DAI NIPPON PRINTING CO., LTD.
Inventor: Keita IIMURA , Shuji KAWAGUCHI , Kazuki KINOSHITA , Hidetoshi IIOKA , Seiji TAKE
IPC: H10K59/127 , H10K59/131
CPC classification number: H10K59/1275 , H10K59/131
Abstract: A multilayer body for an image display device includes a wiring substrate including a substrate having transparency, and a mesh wiring layer disposed on the substrate; and a dielectric layer stacked on the wiring substrate. The dielectric layer and the substrate have a total thickness of 50 μm or more and 500 μm or less.
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