公开(公告)号：US20150333937A1

公开(公告)日：2015-11-19

申请号：US14710724

申请日：2015-05-13

Applicant: DENSO CORPORATION

Inventor： Tetsuya KUSUMOTO ,  Shigeki OHTSUKA ,  Nobuaki MATSUDAIRA ,  Hironobu AKITA

IPC: H04L25/03

CPC classification number: H04L25/03057 ,  H04L2025/0349

Abstract: In a decision feedback equalizer, at least one of weighting devices that has a tap coefficient an absolute value of which is relatively larger than absolute values of tap coefficients of other weighting devices is referred to as a main weighting device, and delay elements are disposed asymmetrically on signal processing paths or updating paths of the to coefficients of the weighting devices in such a manner that an updating interval of the tap coefficient of the main weighting device is shorter than updating intervals of the tap coefficients of the other weighting devices.

Abstract translation: 在判定反馈均衡器中，具有绝对值的抽头系数相对大于其他加权装置的抽头系数的绝对值的加权装置中的至少一个被称为主加权装置，并且延迟元件被非对称地布置 以加权装置的系数的信号处理路径或更新路径，使得主加权装置的抽头系数的更新间隔短于其他加权装置的抽头系数的更新间隔。

公开(公告)号：US20150222455A1

公开(公告)日：2015-08-06

申请号：US14584015

申请日：2014-12-29

Applicant: DENSO CORPORATION

Inventor： Shigeki OHTSUKA ,  Hironobu AKITA ,  Nobuaki MATSUDAIRA ,  Takahisa YOSHIMOTO

IPC: H04L25/02 ,  H04B1/40 ,  H04L5/20

CPC classification number: H04L25/0272 ,  H04B1/40 ,  H04L7/04

Abstract: A communication system including multiple communication nodes is provided. Each of the multiple communication nodes includes a low speed communication transceiver that is directly connected to a differential communication channel, and a high speed communication transceiver that is AC coupled to the differential channel. The multiple communication nodes include a sending communication node. The sending communication node sends a command to switch from the low speed communication to a high speed communication when the sending communication node performs a low speed communication using the low speed communication transceiver. The sending communication node initiates the high speed communication using the high speed communication transceiver.

Abstract translation: 提供了包括多个通信节点的通信系统。 多个通信节点中的每一个包括直接连接到差分通信信道的低速通信收发器以及AC耦合到差分信道的高速通信收发器。 多个通信节点包括发送通信节点。 当发送通信节点使用低速通信收发器执行低速通信时，发送通信节点发送从低速通信切换到高速通信的命令。 发送通信节点使用高速通信收发器发起高速通信。

公开(公告)号：US20180205572A1

公开(公告)日：2018-07-19

申请号：US15744103

申请日：2016-06-13

Applicant: DENSO CORPORATION

Inventor： Tomohisa KISHIGAMI ,  Shigeki OHTSUKA ,  Nobuaki MATSUDAIRA ,  Hironobu AKITA

IPC: H04L12/40

CPC classification number: H04L12/40169 ,  H04L25/02 ,  H04L25/0272 ,  H04L25/03 ,  H04L2012/40215 ,  H04L2012/40273

Abstract: A communication system includes a transmission path and multiple nodes. At least one of the multiple nodes includes a second communication portion and a control portion in addition to a first communication portion. When the control portion performs a high speed communication, the control portion shifts the first communication portion included in each of the remaining multiple nodes to a sleep mode. The second communication portion performs a differential communication at a higher speed than the first communication portion using a differential signal. In the differential signal, a maximum of a potential difference between the pair of communication lines is equal to or less than a recessive threshold value, and a minimum of the potential difference between the pair of communication lines is a negative voltage value that has a polarity opposite to the recessive threshold value of the first communication portion.

公开(公告)号：US20160241422A1

公开(公告)日：2016-08-18

申请号：US15027534

申请日：2014-09-22

Applicant: DENSO CORPORATION

Inventor： Hironobu AKITA ,  Shigeki OHTSUKA ,  Nobuaki MATSUDAIRA ,  Takahisa YOSHIMOTO

IPC: H04L25/03

CPC classification number: H04L25/03057 ,  H04B3/04 ,  H04B3/10 ,  H04B3/14 ,  H04L25/0272 ,  H04L25/0278 ,  H04L25/03 ,  H04L2025/03815

Abstract: A distortion compensation system includes a first communication node including a first reception unit including an equalizer configured by a first digital filter unit and a first transmission unit including an emphasis circuit configured by a second digital filter unit, and a second communication node including a second transmission unit transmitting a training pattern before receiving normal data from the first communication node. The equalizer converges a filter constant of the first digital filter unit so that an error of the received training pattern is converged. The first transmission unit performs a distortion compensation using the converged filter constant of the first digital filter unit as at least a part of a filter constant of the second digital filter unit of the emphasis circuit, and then transmits the data.

Abstract translation: 失真补偿系统包括第一通信节点，第一通信节点包括第一接收单元，第一接收单元包括由第一数字滤波器单元配置的均衡器和包括由第二数字滤波器单元配置的加重电路的第一发送单元，以及第二通信节点， 在从第一通信节点接收正常数据之前发送训练模式的单元。 均衡器收敛第一数字滤波器单元的滤波器常数，使得接收到的训练模式的误差收敛。 第一发送单元使用第一数字滤波器单元的收敛滤波器常数作为加权电路的第二数字滤波器单元的滤波常数的至少一部分进行失真补偿，然后发送数据。

公开(公告)号：US20160036606A1

公开(公告)日：2016-02-04

申请号：US14807158

申请日：2015-07-23

Applicant: DENSO CORPORATION

Inventor： Nobuaki MATSUDAIRA ,  Hironobu AKITA ,  Shigeki OHTSUKA

IPC: H04L27/01 ,  H04L7/00 ,  H04B1/00

CPC classification number: H04L27/01 ,  H04B1/0003 ,  H04L7/0012 ,  H04L7/0025 ,  H04L7/0058 ,  H04L7/033 ,  H04L7/042

Abstract: A waveform equalization apparatus includes an A/D converter, a waveform equalizer, a training sequence generator, a clock recovery circuit, multiple matched filters, and a clock optimization logic. The A/D converter oversamples a reception signal in synchronization with a base clock signal and generates an A/D converted data sequence. The waveform equalizer performs an arithmetic operation to equalize a waveform. The training sequence generator generates a data sequence for training. The data sequence for training is used instead of an output data of the detector so as to converge a coefficient used in the arithmetic operation in advance. The clock recovery circuit supplies the base clock signal without executing a clock recovery operation during a training period, and executes the clock recovery operation according to the output data of the detector. The matched filters receive the A/D converted data sequence, and execute a filter arithmetic operation.

Abstract translation: 波形均衡装置包括A / D转换器，波形均衡器，训练序列发生器，时钟恢复电路，多个匹配滤波器和时钟优化逻辑。 A / D转换器与基本时钟信号同步地过采样接收信号，并产生A / D转换的数据序列。 波形均衡器进行算术运算以使波形均衡。 训练序列生成器生成用于训练的数据序列。 使用用于训练的数据序列代替检测器的输出数据，以便事先收敛在算术运算中使用的系数。 时钟恢复电路在训练期间提供基本时钟信号而不执行时钟恢复操作，并且根据检测器的输出数据执行时钟恢复操作。 匹配滤波器接收A / D转换的数据序列，并执行滤波算术运算。

公开(公告)号：US20150244420A1

公开(公告)日：2015-08-27

申请号：US14607200

申请日：2015-01-28

Applicant: DENSO CORPORATION

Inventor： Nobuaki MATSUDAIRA ,  Shigeki OHTSUKA ,  Hironobu AKITA

IPC: H04B3/54 ,  H04B1/10 ,  H04L29/08

CPC classification number: H04B3/54 ,  H04B1/10 ,  H04L67/1051

Abstract: A communication system includes multiple communication nodes and a communication line. The multiple communication nodes include a master and multiple slaves. The communication line cascade-connects the communication nodes and supplies electricity. The communication line corresponds to a feeder line. Each of the communication nodes is connected with the communication line through an inductor to be supplied with electricity. The each of the communication nodes is AC coupled to the communication line to transmit and receive a communication signal. The master and the slaves perform a bidirectional communication. A communication slave is provided. The communication slave is connected with a communication line through an inductor to be supplied with electricity. A communication master is provided.

Abstract translation: 通信系统包括多个通信节点和通信线路。 多个通信节点包括主站和多个从站。 通信线路级联连接通信节点并供电。 通信线对应于馈线。 每个通信节点通过电感器与通信线路连接以供电。 通信节点中的每一个被交流耦合到通信线路以发送和接收通信信号。 主机和从机进行双向通信。 提供通信从站。 通信从机通过电感器与通信线路连接以供电。 提供通信主机。

公开(公告)号：US20150220471A1

公开(公告)日：2015-08-06

申请号：US14606336

申请日：2015-01-27

Applicant: DENSO CORPORATION

Inventor： Kenji INAZU ,  Shinichirou TAGUCHI ,  Hirofumi YAMAMOTO ,  Keita HAYAKAWA ,  Hironobu AKITA ,  Shigeki OHTSUKA ,  Nobuaki MATSUDAIRA ,  Takahisa YOSHIMOTO

IPC: G06F13/40 ,  G06F13/42

CPC classification number: G06F13/4068 ,  G06F13/4221 ,  Y02D10/14 ,  Y02D10/151

Abstract: A communication system includes a communication wiring, at least one master node connected to the communication wiring, and at least one slave node connected to the communication wiring. The at least one master node and the at least one slave node are connected in a ring shape through the communication wiring and communicate in a start-stop synchronous communication.

Abstract translation: 通信系统包括通信布线，连接到通信布线的至少一个主节点和连接到通信布线的至少一个从节点。 所述至少一个主节点和所述至少一个从节点通过所述通信线路连接成环形，并以起始 - 停止同步通信进行通信。