Abstract:
A scheme is described to switch the power supply to the MEMS microphone on and off in a cyclic manner that is synchronized with the associated ADC sampling rate. In this way the MEMS microphone amplifier, whether it is a J-FET transistor or an operational amplifier, is off most of the cycle time, and is turned on only for a few micro-seconds prior to the sample-and-hold timing of the ADC device. By this method, the average power consumption of an existing analog MEMS microphone can be reduced by a factor of 10 or more.
Abstract:
A scheme is described to switch the power supply to the MEMS microphone on and off in a cyclic manner that is synchronized with the associated ADC sampling rate. In this way the MEMS microphone amplifier, whether it is a J-FET transistor or an operational amplifier, is off most of the cycle time, and is turned on only for a few micro-seconds prior to the sample-and-hold timing of the ADC device. By this method, the average power consumption of an existing analog MEMS microphone can be reduced by a factor of 10 or more.
Abstract:
In a mobile device, a bone conduction or vibration sensor is used to detect the user's speech and the resulting output is used as the source for a low power Voice Trigger (VT) circuit that can activate the Automatic Speech Recognition (ASR) of the host device. This invention is applicable to mobile devices such as wearable computers with head mounted displays, mobile phones and wireless headsets and headphones which use speech recognition for the entering of input commands and control. The speech sensor can be a bone conduction microphone used to detect sound vibrations in the skull, or a vibration sensor, used to detect sound pressure vibrations from the user's speech. This VT circuit can be independent of any audio components of the host device and can therefore be designed to consume ultra-low power. Hence, this VT circuit can be active when the host device is in a sleeping state and can be used to wake the host device on detection of speech from the user. This VT circuit will be resistant to outside noise and react solely to the user's voice.
Abstract:
A processor, that may include at least one neural network that comprises at least one leaky spiking neuron; wherein the at least one leaky spiking neuron is configured to directly receive an input pulse density modulation (PDM) signal from a sensor; wherein the input PDM signal represents a detected signal that was detected by the sensor; and wherein the at least one neural network is configured to process the input PDM signal to provide an indication about the detected input signal.
Abstract:
A method and a MAC unit that may include accumulation unit and a multiplier. A accumulation unit that includes a first part, a second part and a third part. The first part may calculate a truncated sum. The second part may be configured to (a) receive, during each calculation cycle, a carry out of an add operation performed during a calculation cycle, (b) receive a sign bit of an intermediate product calculated during the calculation cycle; and (c) calculate, by the counter logic, a counter logic value, and (d) convert, after a start of a last calculation cycle of the calculation cycles, an output value of the counter logic to an intermediate value having a two's complement format. The third part may be configured to calculate an output value of the MAC unit based on the intermediate value and a truncated sum calculated by the first part of the accumulation unit.
Abstract:
A neural network that may include multiple layers of neural cells; wherein a certain neural cell of a certain layer of neural cells may include a first plurality of one-bit inputs; an adder and leaky integrator unit; and an activation function circuit that has a one-bit output; wherein the first plurality of one-bit inputs are coupled to a first plurality of one-bit outputs of neural cells of a layer that precedes the certain layer; wherein the adder and leaky integration unit is configured to calculate a leaky integral of a weighted sum of a number of one-bit pulses that were received, during a time window, by the first plurality of one-bit inputs; and wherein the activation function circuit is configured to apply an activation function on the leaky integral to provide a one-bit output of the certain neural cell.
Abstract:
A neural network that may include multiple layers of neural cells; wherein a certain neural cell of a certain layer of neural cells may include a first plurality of one-bit inputs; an adder and leaky integrator unit; and an activation function circuit that has a one-bit output; wherein the first plurality of one-bit inputs are coupled to a first plurality of one-bit outputs of neural cells of a layer that precedes the certain layer; wherein the adder and leaky integration unit is configured to calculate a leaky integral of a weighted sum of a number of one-bit pulses that were received, during a time window, by the first plurality of one-bit inputs; and wherein the activation function circuit is configured to apply an activation function on the leaky integral to provide a one-bit output of the certain neural cell.
Abstract:
A method for providing codewords, the method may include receiving by an input buffer, one or more chunks of data; calculating a location of relevant bits within one or more chunks of data; wherein the relevant bits comprise (a) variable length retrieval information used during a retrieval process of a first type codeword, or (b) a second type codeword; performing the retrieval process of the first type codeword and retrieving the first type codeword from a memory unit that stores only a fraction of a codebook, the codebook comprises first type codewords and second type codewords; determining whether the relevant bits comprises the second type codeword or not; and outputting the second type codeword or the first type codeword, based on the determination.
Abstract:
A method for charge-reuse, the method may include performing multiple repetitions of the steps of: operating a second capacitive load while the second capacitive load is disconnected from a first capacitive load; wherein the second capacitive load is a Microelectromechanical systems (MEMS) capacitive load or a Nanoelectromechanical systems (NEMS) capacitive load; electrically coupling a first capacitive load to a second capacitive load via a path that comprises an inductor; charging the first capacitive load with a second charge provided from the second capacitive load; electrically disconnecting the first capacitive load, the second capacitive load and the inductor from each other; feeding the inductor with a supply current provided by a supply circuit; disconnecting the inductor from the supply circuit and coupling the inductor to the first capacitive load; charging the first capacitive load by the inductor; electrically coupling the first capacitive load to the second capacitive load via the path that comprises the inductor; charging the second capacitive load with a first charge provided from the first capacitive load; and operating the second capacitive load while the second capacitive load is disconnected from the first capacitive load.
Abstract:
A method for voice triggering, the method may include coupling, by an interface of a voice trigger sensor, the voice trigger sensor to a computer; receiving, by the voice trigger sensor, from the computer configuration information; configuring the voice trigger sensor by using the configuration information; coupling, by the interface, the voice trigger sensor to a target device during a voice activation period; receiving, by a processor of the voice trigger sensor, during the voice activation period, input signals; applying, by the processor, on the input signals a voice activation process to detect a voice command; andat least partially participating in an execution of the voice command.