Method and apparatus for error detection and correction in image sensor
    3.
    发明授权
    Method and apparatus for error detection and correction in image sensor 有权
    图像传感器误差检测和校正方法及装置

    公开(公告)号:US06707493B1

    公开(公告)日:2004-03-16

    申请号:US09343097

    申请日:1999-06-29

    IPC分类号: H04N964

    CPC分类号: H04N5/367

    摘要: An image sensor according to the present invention can detect and correct an error value of a defective pixel. The image sensor includes an error detection circuit for detecting an error by comparing difference between a current pixel value and a previous pixel value with a predetermined reference value and an error correction circuit for correcting an error value from a pixel, by substituting the previous pixel value for the current pixel value.

    摘要翻译: 根据本发明的图像传感器可以检测和校正缺陷像素的误差值。 图像传感器包括:误差检测电路,用于通过将当前像素值与先前像素值之间的差与预定参考值相比较来检测误差;以及误差校正电路,用于通过将先前像素值 对于当前像素值。

    System for Controlling the Reactivity of Boronic Acids
    4.
    发明申请
    System for Controlling the Reactivity of Boronic Acids 有权
    控制硼酸反应体系

    公开(公告)号:US20120059184A1

    公开(公告)日:2012-03-08

    申请号:US13190223

    申请日:2011-07-25

    IPC分类号: C07F5/04

    摘要: A protected organoboronic acid includes a boron having an sp3 hybridization, a conformationally rigid protecting group bonded to the boron, and an organic group bonded to the boron through a boron-carbon bond. A method of performing a chemical reaction includes contacting a protected organoboronic acid with a reagent, the protected organoboronic acid including a boron having an sp3 hybridization, a conformationally rigid protecting group bonded to the boron, and an organic group bonded to the boron through a boron-carbon bond. The organic group is chemically transformed, and the boron is not chemically transformed.

    摘要翻译: 受保护的有机硼酸包括具有sp 3杂交的硼,与硼结合的构象刚性保护基,以及通过硼 - 碳键与硼结合的有机基团。 进行化学反应的方法包括使受保护的有机硼酸与试剂接触,被保护的有机硼酸包括具有sp3杂交的硼,与硼结合的构象刚性保护基,和通过硼键合到硼上的有机基团 碳键。 有机基团被化学转化,并且硼不被化学转化。

    Superscalar processor employing a high performance write back buffer controlled by a state machine to reduce write cycles
    5.
    发明授权
    Superscalar processor employing a high performance write back buffer controlled by a state machine to reduce write cycles 失效
    采用由状态机控制的高性能回写缓冲器的超标量处理器来减少写周期

    公开(公告)号:US06170040A

    公开(公告)日:2001-01-02

    申请号:US08964133

    申请日:1997-11-06

    IPC分类号: G06F1300

    CPC分类号: G06F9/3824 G06F12/0804

    摘要: A microprocessor of a superscalar structure having a datapath, a data cache, a bus unit and first and second pipelines includes a write buffer equipped in the bus unit and a write back buffer in the data cache to reduce write cycles. The write buffer receives data of a burst write cycle from the write back buffer and data of a single write cycle from the datapath. The write buffer in the microprocessor allows data to be written in the write buffer and then to be written in the external memory when the microprocessor is available for performing an external cycle. The processor includes a state machine to control the write buffer and also includes one write buffer for each of the first and second pipelines in order to diminish the write cycles. The write buffers also include a bit block which indicates whether information in the write buffer is written by a cache miss or a hit in a line having a shared state. The state machine includes idle, request, service, backoff (BOFF) and update states in controlling write cycle progression in a pipeline.

    摘要翻译: 具有数据路径,数据高速缓存,总线单元以及第一和第二管线的超标量结构的微处理器包括配置在总线单元中的写缓冲器和数据高速缓存中的回写缓冲器,以减少写周期。 写入缓冲器从写回缓冲器接收脉冲串写入周期的数据,并从数据路径接收单个写入周期的数据。 微处理器中的写缓冲器允许将数据写入写缓冲器,然后当微处理器可用于执行外部周期时,将其写入外部存储器。 该处理器包括一个控制写缓冲器的状态机,并且还包括用于第一和第二管线中的每一个的一个写入缓冲器,以便减少写周期。 写缓冲器还包括一个位块,它指示写入缓冲器中的信息是否由具有共享状态的行中的高速缓存未命中或命中写入。 状态机包括空闲,请求,服务,退避(BOFF)和控制流水线中的写周期进程的更新状态。

    SYSTEM FOR CONTROLLING THE REACTIVITY OF BORONIC ACIDS
    6.
    发明申请
    SYSTEM FOR CONTROLLING THE REACTIVITY OF BORONIC ACIDS 有权
    用于控制硼酸的反应性的系统

    公开(公告)号:US20090030238A1

    公开(公告)日:2009-01-29

    申请号:US11937338

    申请日:2007-11-08

    IPC分类号: C07F5/02

    摘要: A protected organoboronic acid includes a boron having an sp3 hybridization, a conformationally rigid protecting group bonded to the boron, and an organic group bonded to the boron through a boron-carbon bond. A method of performing a chemical reaction includes contacting a protected organoboronic acid with a reagent, the protected organoboronic acid including a boron having an sp3 hybridization, a conformationally rigid protecting group bonded to the boron, and an organic group bonded to the boron through a boron-carbon bond. The organic group is chemically transformed, and the boron is not chemically transformed.

    摘要翻译: 受保护的有机硼酸包括具有sp 3杂交的硼,与硼结合的构象刚性保护基,以及通过硼 - 碳键与硼结合的有机基团。 进行化学反应的方法包括使受保护的有机硼酸与试剂接触,被保护的有机硼酸包括具有sp3杂交的硼,与硼结合的构象刚性保护基,和通过硼键合到硼上的有机基团 碳键。 有机基团被化学转化,并且硼不被化学转化。

    Bus interface unit capable of simultaneously proceeding with two bus
cycles in a high-performance microprocessor
    7.
    发明授权
    Bus interface unit capable of simultaneously proceeding with two bus cycles in a high-performance microprocessor 失效
    总线接口单元能够在高性能微处理器中同时进行两个总线周期

    公开(公告)号:US5881256A

    公开(公告)日:1999-03-09

    申请号:US965764

    申请日:1997-11-07

    申请人: Suk Joong Lee

    发明人: Suk Joong Lee

    IPC分类号: G06F13/36 G06F12/08 G06F13/14

    CPC分类号: G06F12/0835

    摘要: A bus interface unit of a microprocessor which can simultaneously process bus cycle's requests coming from various pipelines during for one cycle in the pipelined high-performance microprocessor of a superscalar type. The bus interface unit includes a bus cycle arbiter for arbitrating a plurality of cycle requests inputted from a plurality of units, a cycle multiplexer for selecting cycle information inputted from the units in response to an arbitration determination of the bus cycle arbiter, a cycle queue for storing selected information, a cycle generator for generating a bus cycle in response to the information stored in the cycle queue, a bus controller for controlling the bus interface unit as a whole, and a write buffer for enabling a next operation without waiting for the core unit to complete its write operation to improve a performance of a memory write cycle. According to the bus interface unit, the bus cycle requests from respective pipelines of the microprocessor are simultaneously processed during one cycle.

    摘要翻译: 一种微处理器的总线接口单元,其可以在超标量型流水线高性能微处理器中的一个周期内同时处理来自各种管线的总线循环请求。 总线接口单元包括用于仲裁从多个单元输入的多个周期请求的总线周期仲裁器,用于响应于总线周期仲裁器的仲裁确定从该单元输入的周期信息的周期多路复用器,用于 存储所选择的信息,响应于存储在循环队列中的信息产生总线周期的循环发生器,用于总体控制总线接口单元的总线控制器和用于在不等待核心的情况下实现下一个操作的写入缓冲器 单元来完成其写操作,以提高存储器写周期的性能。 根据总线接口单元,在一个周期内同时对来自微处理器各管线的总线周期请求进行处理。

    System for controlling the reactivity of boronic acids
    8.
    发明授权
    System for controlling the reactivity of boronic acids 有权
    控制硼酸反应性的体系

    公开(公告)号:US08013203B2

    公开(公告)日:2011-09-06

    申请号:US11937338

    申请日:2007-11-08

    IPC分类号: C07F5/02 C07F9/02

    摘要: A protected organoboronic acid includes a boron having an sp3 hybridization, a conformationally rigid protecting group bonded to the boron, and an organic group bonded to the boron through a boron-carbon bond. A method of performing a chemical reaction includes contacting a protected organoboronic acid with a reagent, the protected organoboronic acid including a boron having an sp3 hybridization, a conformationally rigid protecting group bonded to the boron, and an organic group bonded to the boron through a boron-carbon bond. The organic group is chemically transformed, and the boron is not chemically transformed.

    摘要翻译: 受保护的有机硼酸包括具有sp 3杂交的硼,与硼结合的构象刚性保护基,以及通过硼 - 碳键与硼结合的有机基团。 进行化学反应的方法包括使受保护的有机硼酸与试剂接触,被保护的有机硼酸包括具有sp3杂交的硼,与硼结合的构象刚性保护基,和通过硼键合到硼上的有机基团 碳键。 有机基团被化学转化,并且硼不被化学转化。

    Arbitration apparatus using least recently used algorithm
    9.
    发明授权
    Arbitration apparatus using least recently used algorithm 失效
    使用最近最少使用算法的仲裁设备

    公开(公告)号:US5748969A

    公开(公告)日:1998-05-05

    申请号:US649134

    申请日:1996-05-14

    CPC分类号: G06F13/364

    摘要: An arbitration apparatus using a least recently used (LRU) algorithm, wherein when a plurality of request devices simultaneously request to use a shared resource, such requests are arbitrated in such a manner that the right to use the shared resource is assigned to the request device with the highest priority. The apparatus includes a priority determining unit for receiving shared-resource request signals from a plurality of request devices and resource using order signals respectively associated with the request devices, thereby outputting a grant signal for the request device with the highest priority along with an arbitration-done signal, a recording register for receiving the grant signal, associated with the use of the shared resource, from the priority determining unit, the recording register storing the resource using order based on the grant signal and outputting the stored data to the priority determining unit, and a status machine for receiving the arbitration-done signal from the priority determining unit along with the request signals from the request devices and other control signals, thereby outputting a status information and control signal to the priority determining unit and a recording register control signal to the recording register.

    摘要翻译: 一种使用最近最少使用的(LRU)算法的仲裁装置,其中当多个请求装置同时请求使用共享资源时,以使得共享资源的权利被分配给请求装置的方式来仲裁这样的请求 具有最高优先级。 该装置包括:优先级确定单元,用于从多个请求设备接收共享资源请求信号,并且使用与请求设备分别相关联的订单信号的资源,从而输出具有最高优先级的请求设备的授权信号以及仲裁 - 完成信号,用于从所述优先级确定单元接收与所述共享资源的使用相关联的所述授权信号的记录寄存器,所述记录寄存器基于所述授权信号使用订单来存储所述资源,并将所存储的数据输出到所述优先级确定单元 以及用于从优先级确定单元接收来自请求装置的请求信号和其他控制信号的仲裁完成信号的状态机,从而将状态信息和控制信号输出到优先级确定单元和记录寄存器控制信号 到记录寄存器。

    CMOS image sensor with testing circuit for verifying operation thereof
    10.
    发明授权
    CMOS image sensor with testing circuit for verifying operation thereof 有权
    CMOS图像传感器,具有用于验证其操作的测试电路

    公开(公告)号:US06633335B1

    公开(公告)日:2003-10-14

    申请号:US09258448

    申请日:1999-02-26

    IPC分类号: H04N314

    摘要: The present invention relates to a picture display using CMOS (Complementary Metal Oxide Semiconductor) image sensor; and, more particularly, to a CMOS image sensor having a testing circuit embedded therein and a method for verifying operation of the CMOS image sensor using the testing circuit. The CMOS image sensor according to the present invention includes a control/interface unit for controlling its operation sensor using a state machine and for interfacing the CMOS image sensor with an external system; a pixel array including a plurality of pixels sensing images from an object and generating analogue signals according to an amount of incident light; a converter for converting the analogue signals into digital signals to be processed in a digital logic circuit; and a testing circuit for verifying operations of the converter and the control/interface unit, by controlling the converter.

    摘要翻译: 本发明涉及使用CMOS(互补金属氧化物半导体)图像传感器的图像显示器; 更具体地,涉及具有嵌入其中的测试电路的CMOS图像传感器以及使用该测试电路验证CMOS图像传感器的操作的方法。 根据本发明的CMOS图像传感器包括:控制/接口单元,用于使用状态机控制其操作传感器并将CMOS图像传感器与外部系统接口; 像素阵列,其包括感测来自对象的图像的多个像素,并且根据入射光的量产生模拟信号; 用于将模拟信号转换成数字逻辑电路中要处理的数字信号的转换器; 以及通过控制转换器来验证转换器和控制/接口单元的操作的测试电路。