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    Apparatus and Method for Selectively Monitoring Multiple Voltages in an IC or other Electronic Chip
    1.
    发明申请
    Apparatus and Method for Selectively Monitoring Multiple Voltages in an IC or other Electronic Chip 失效
    用于选择性监测IC或其他电子芯片中的多个电压的装置和方法

    公开(公告)号：US20070239387A1

    公开(公告)日：2007-10-11

    申请号：US11278848

    申请日：2006-04-06

    申请人： Daniel Douriet ,  Anand Haridass ,  Andreas Huber ,  Colm O'Reilly ,  Bao Truong ,  Roger Weekly

    发明人： Daniel Douriet ,  Anand Haridass ,  Andreas Huber ,  Colm O'Reilly ,  Bao Truong ,  Roger Weekly

    IPC分类号： G06F19/00

    CPC分类号： G01R19/16552

    摘要： An apparatus and method are provided for monitoring the voltage available in each domain of multiple voltage domains of a partitioned electronic chip. In embodiments of the invention, only a single pair of C4 pins is required for all voltage monitoring activity. One useful embodiment is directed to apparatus for monitoring the level of voltage associated with each domain in a partitioned chip. The apparatus comprises a single conductive link coupled to the chip, and further comprises a domain selection network having a single output and a plurality of switchable inputs, the output being connected to the single conductive link, and two inputs being connected to monitor respective voltage levels of two of the plurality of voltage domains. A control mechanism is disposed to operate the selection network, in order to selectively connect one of the inputs to the single conductive link, and a sensor device external to the electronic chip is connected to measure the monitored respective voltage levels of two of the plurality of voltage domains using the single conductive link.

    摘要翻译： 提供了一种用于监视分区电子芯片的多个电压域的每个域中可用电压的装置和方法。 在本发明的实施例中，对于所有电压监视活动，仅需要一对C4引脚。 一个有用的实施例涉及用于监视与分区芯片中的每个域相关联的电压电平的装置。 该装置包括耦合到芯片的单个导电链路，并且还包括具有单个输出和多个可切换输入的域选择网络，该输出连接到单个导电链路，并且两个输入端被连接以监视相应的电压电平 的多个电压域中的两个。 设置控制机构以操作选择网络，以便选择性地将输入中的一个连接到单个导电链路，并且电子芯片外部的传感器装置被连接以测量所监视的相应的多个 电压域使用单个导电链路。

    Low inductance via arrangement for multilayer ceramic substrates
    2.
    发明申请
    Low inductance via arrangement for multilayer ceramic substrates 失效
    用于多层陶瓷衬底的低电感通孔布置

    公开(公告)号：US20070187468A1

    公开(公告)日：2007-08-16

    申请号：US11355713

    申请日：2006-02-16

    申请人： Daniel Douriet ,  Anand Haridass ,  Andreas Huber ,  Colm O'Reilly ,  Roger Weekly

    发明人： Daniel Douriet ,  Anand Haridass ,  Andreas Huber ,  Colm O'Reilly ,  Roger Weekly

    IPC分类号： B23K5/20 ,  B23K20/10 ,  B23K1/06

    CPC分类号： H05K1/162 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K3/4611 ,  H05K3/4629 ,  H05K2201/09609 ,  H05K2201/09627 ,  Y10T29/49117 ,  Y10T29/49155 ,  H01L2924/00

    摘要： A low inductance via arrangement for multilayer ceramic (MLC) substrates is provided. With the MLC substrate and via arrangement of the illustrative embodiments, the via-field inductance for a given contact pad array is reduced. This reduction is achieved by the introduction of T-jogs and additional vias. These T-jogs and additional vias form additional current paths that cause additional parallel inductances that reduce the via-field inductance. In one illustrative embodiment, the additional T-jogs and vias are added to a center portion of a contact pad array. The T-jogs are comprised of two jogs in a wiring layer of the MLC, each jog being toward a via associated with an adjacent contact pad in the contact pad array. These additional T-jogs and vias form additional current loops parallel to the existing ones which thus, reduce the total inductance of the via-field.

    摘要翻译： 提供了一种用于多层陶瓷（MLC）衬底的低电感通孔布置。 通过MLC衬底和示例性实施例的通孔布置，给定接触焊盘阵列的通孔电感减小。 这种减少是通过引入T-jogs和附加通孔来实现的。 这些T形点动和附加通孔形成额外的电流路径，从而产生额外的并联电感，从而减小通路电感。 在一个说明性实施例中，附加的T形点动和通孔被添加到接触焊盘阵列的中心部分。 T-jogs由MLC的布线层中的两个点动组成，每个点动都朝向与接触垫阵列中的相邻接触焊盘相关联的通孔。 这些额外的T形点动和通孔形成与现有循环平行的额外的电流回路，从而减小通孔的总电感。

    System DC Analysis Methodology
    3.
    发明申请
    System DC Analysis Methodology 有权
    系统直流分析方法

    公开(公告)号：US20070260444A1

    公开(公告)日：2007-11-08

    申请号：US11380058

    申请日：2006-04-25

    申请人： Daniel Douriet ,  Anand Haridass ,  Andreas Huber ,  Colm O'Reilly ,  Bao Gia-Harvey Truong ,  Roger Weekly

    发明人： Daniel Douriet ,  Anand Haridass ,  Andreas Huber ,  Colm O'Reilly ,  Bao Gia-Harvey Truong ,  Roger Weekly

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5036

    摘要： A method of power delivery analysis and design for a hierarchical system including building a model corresponding to each element of the hierarchical system, compiling a repository that contains the models corresponding to each element of the hierarchical system, assembling a system model from the models contained in the repository, flattening the system model, and running a simulation on the flattened system model.

    摘要翻译： 一种用于分层系统的功率传递分析和设计的方法，包括构建与分层系统的每个元件相对应的模型，编译包含与分层系统的每个元件相对应的模型的存储库，从包含的模型组装系统模型 存储库，平整系统模型，并在平面化系统模型上运行仿真。

    Method and Computer Program Product for Designing Power Distribution System in a Circuit
    4.
    发明申请
    Method and Computer Program Product for Designing Power Distribution System in a Circuit 有权
    电路配电系统设计方法与计算机程序产品

    公开(公告)号：US20070250796A1

    公开(公告)日：2007-10-25

    申请号：US11379446

    申请日：2006-04-20

    申请人： Daniel Douriet ,  Anand Haridass ,  Andreas Huber ,  Roger Weekly

    发明人： Daniel Douriet ,  Anand Haridass ,  Andreas Huber ,  Roger Weekly

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5045 ,  G06F2217/78 ,  Y02E60/76 ,  Y04S40/22

    摘要： A method for designing a power distribution system including: receiving a cross section file that contains the layout of a PCB including a location of one or more power sinks and sources on the PCB; creating an initial power distribution system; evaluating the initial power distribution system against a cost function; creating a new power distribution system; evaluating the new power distribution system against the cost function; determining if the cost function associated with the new power distribution system is equal to or greater than a stop criterion; and creating another new power distribution system if the cost function associated with the new power distribution system is greater than the stop criterion.

    摘要翻译： 一种用于设计配电系统的方法，包括：接收包含PCB的布局的横截面文件，所述布局包括PCB上的一个或多个电源和源的位置; 创建初始配电系统; 根据成本函数评估初始配电系统; 建立新的配电系统; 根据成本函数评估新的配电系统; 确定与新配电系统相关联的成本函数是否等于或大于停止准则; 并且如果与新配电系统相关联的成本函数大于停止标准，则创建另一新的配电系统。

    Design method and system for minimizing blind via current loops
    6.
    发明授权
    Design method and system for minimizing blind via current loops 有权
    通过电流回路最小化设计方法和系统

    公开(公告)号：US07765504B2

    公开(公告)日：2010-07-27

    申请号：US11829179

    申请日：2007-07-27

    申请人： Daniel Douriet ,  Anand Haridass ,  Andreas Huber ,  Roger D. Weekly

    发明人： Daniel Douriet ,  Anand Haridass ,  Andreas Huber ,  Roger D. Weekly

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5081 ,  H05K1/0216 ,  H05K1/115 ,  H05K3/0005 ,  H05K2201/09636

    摘要： A design method and system for minimizing blind via current loops provides for improvement of electrical interconnect structure design without requiring extensive electromagnetic analysis. Other vias in the vicinity of a blind via carrying a critical signal are checked for suitability to conduct return current corresponding to the critical signal that is disrupted by the transition from a layer between two metal planes to another layer. The distance to the return current via(s) is checked and the design is adjusted to reduce the distance if the distance is greater than a specified threshold. If the blind via transition is to an external layer, suitable vias connect the reference plane at the internal end of the blind via to an external terminal. If the transition is between internal layers, suitable vias are vias that connect the two reference planes surrounding the reference plane traversed by the blind via.

    摘要翻译： 用于最小化盲通过电流回路的设计方法和系统提供了电互连结构设计的改进，而不需要广泛的电磁分析。 检查通过携带关键信号的盲目附近的其他通孔是否​​适合于进行对应于由两个金属平面之间的层到另一层之间的过渡而被破坏的关键信号的返回电流。 检查通过（s）的返回电流的距离，并且如果距离大于指定的阈值，则设计被调整以减小距离。 如果盲目通过转换到外部层，合适的通孔将盲通孔内部的参考平面连接到外部端子。 如果过渡在内层之间，合适的通孔是连接围绕由盲孔通过的参考平面的两个参考平面的通孔。

    Power delivery analysis and design
    9.
    发明授权
    Power delivery analysis and design 有权
    电力分配和设计

    公开(公告)号：US08055486B2

    公开(公告)日：2011-11-08

    申请号：US12187164

    申请日：2008-08-06

    申请人： Daniel Douriet ,  Anand Haridass ,  Andreas Huber ,  Colm B. O'Reilly ,  Bao Gia-Harvey Truong ,  Roger D. Weekly

    发明人： Daniel Douriet ,  Anand Haridass ,  Andreas Huber ,  Colm B. O'Reilly ,  Bao Gia-Harvey Truong ,  Roger D. Weekly

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5036

    摘要： A computer program product is provided for power delivery analysis and design for a hierarchical system. The product includes a storage medium, readable by a processing circuit, for storing instructions for execution by the processing circuit for facilitating a method. The method includes building a model corresponding to each element of the hierarchical system, and compiling a repository that contains models corresponding to each element, where the repository includes a net list, a domain list, a component list, a pin list, and a layer list. The method also includes performing optimized gridding for each element, the net list, the domain list, the component list, the pin list, and the layer list; assembling a system model from the models contained in the repository; flattening the system model by converting the system model to a flattened system model that consists entirely of resistors; and running a simulation on the flattened system model.

    摘要翻译： 提供计算机程序产品用于分层系统的功率传递分析和设计。 该产品包括可由处理电路读取的存储介质，用于存储由处理电路执行以便于方法的指令。 该方法包括构建与分级系统的每个元素相对应的模型，以及编译包含与每个元素对应的模型的仓库，其中仓库包括网络列表，域列表，组件列表，引脚列表和层 列表。 该方法还包括对每个元素，网络列表，域列表，组件列表，引脚列表和层列表执行优化的网格化; 从存储库中包含的模型组装系统模型; 通过将系统模型转换为完全由电阻组成的扁平化系统模型来平坦化系统模型; 并在扁平化系统模型上运行模拟。

    Method and apparatus for facilitating signal transmission using differential transmission lines
    10.
    发明授权
    Method and apparatus for facilitating signal transmission using differential transmission lines 失效
    使用差分传输线促进信号传输的方法和装置

    公开(公告)号：US07671273B2

    公开(公告)日：2010-03-02

    申请号：US11869130

    申请日：2007-10-09

    申请人： Daniel Douriet ,  Anand Haridass ,  Andreas Huber ,  Colm Brian O'Reilly ,  Roger Donell Weekly

    发明人： Daniel Douriet ,  Anand Haridass ,  Andreas Huber ,  Colm Brian O'Reilly ,  Roger Donell Weekly

    IPC分类号： H01B11/02

    CPC分类号： H01B11/04

    摘要： The illustrative embodiments described herein provide an apparatus and method for facilitating signal transmission using differential transmission lines. The apparatus includes a first differential transmission line. The first differential transmission line includes a first plurality of conductors. The first plurality of conductors includes a set of conductors. The apparatus also includes a second differential transmission line. The second differential transmission line includes a second plurality of conductors. The second plurality of conductors includes a first conductor and a second conductor. A first noise produced by the first conductor on the set of conductors is balanced by a second noise produced by the second conductor on the set of conductors. The first differential transmission line and the second differential transmission line facilitate signal transmission.

    摘要翻译： 本文描述的说明性实施例提供了一种用于使用差分传输线促进信号传输的装置和方法。 该装置包括第一差分传输线。 第一差分传输线包括第一多个导体。 第一多个导体包括一组导体。 该装置还包括第二差分传输线。 第二差分传输线包括第二多个导体。 第二多个导体包括第一导体和第二导体。 由导体组上的第一导体产生的第一噪声由在该组导体上的第二导体产生的第二噪声平衡。 第一差分传输线和第二差分传输线便于信号传输。