摘要:
A subscriber unit for wireless communication with a base station in a wireless subscriber communication system includes a FIR chip, a DIF (digital intermediate frequency) chip, a single prccessor chip and a radio. The processor chip transcodes a digital voice input signal to provide digital input symbols; demodulates an output signal received from the base station to provide digital output symbols; and synthesizes a digital voice output signal from the digital output symbols. The FIR chip FIR filters the digital input symbols and generates timing signals for timing the transcoding and synthesizing operations in the processor chip. The DIF chip digitally synthesizes a digital intermediate frequency signal by direct digital synthesis (DDS) and modulates the digital intermediate frequency signal with the filtered input symbols to provide a modulated intermediate frequency input signal. The radio further processes the modulated input signal for transmission to the base station.
摘要:
A subscriber unit for wireless communication with a base station in a wireless subscriber communication system includes a FIR chip, a DIF (digital intermediate frequency) chip, a single processor chip and a radio. The processor chip transcodes a digital voice input signal to provide digital input symbols; demodulates an output signal received from the base station to provide digital output symbols; and synthesizes a digital voice output signal from the digital output symbols. The FIR chip FIR filters the digital input symbols and generates timing signals for timing the transcoding and synthesizing operations in the processor chip. The DIF chip digitally synthesizes a digital intermediate frequency signal by direct digital synthesis (DDS) and modulates the digital intermediate frequency signal with the filtered input symbols to provide a modulated intermediate frequency input signal. The radio further processes the modulated input signal for transmission to the base station.
摘要:
The present invention is a method and system for processing communication signals in a wireless telecommunication system having at least two subscriber units. The subscriber units communicate with each other through a selected band of radio frequencies over a plurality of radio frequency channels. The system generates a fixed based radio frequency signal and a digital intermediate frequency signal. The fixed based radio frequency signal and the digital intermediate frequency signal are then combined to produce a carrier signal which is communicated between the at least two subscribers.
摘要:
A subscriber unit for wireless communication with a base station in a wireless subscriber communication system includes a FIR chip, a DIF (digital intermediate frequency) chip, a single processor chip and a radio. The processor chip transcodes a digital voice input signal to provide digital input symbols; demodulates an output signal received from the base station to provide digital output symbols; and synthesizes a digital voice output signal from the digital output symbols. The FIR chip FIR filters the digital input symbols and generates timing signals for timing the transcoding and synthesizing operations in the processor chip. The DIF chip digitally synthesizes a digital intermediate frequency signal by direct digital synthesis (DDS) and modulates the digital intermediate frequency signal with the filtered input symbols to provide a modulated intermediate frequency input signal. The radio further processes the modulated input signal for transmission to the base station.
摘要:
A FIR chip is used in a wireless subscriber unit. The subscriber unit includes a processor for transcoding an input signal to provide digital input symbols. A received output signal is demodulated. Digital output symbols are synthesized from the demodulated output signal processor and filtered digital input symbols are provided. An internal address decoder decodes to allow the processor to access internal functions of the FIR chip. A control and status register allows the processor to read the status of and control the internal functions of the FIR chip. A FIR filter filters the digital input symbols. A transmit timer controls timing which allows the processor to control the FIR filter. A receive timer generates timing signals for timing transcoding operations and synthesizing operations connected to the processor.
摘要:
A subscriber unit has a processor. The processor provides an output phase signal corresponding to a selected output digital frequency. A tuning register buffers the phase signal. A lookup table has two sets of predefined stored values pertaining to the amplitude of a signal for a single quadrant. The predefined stored values comprise coarse angle approximations and fine angle approximations. A sine and cosine generator receives the phase signal and generates sine and cosine waveforms utilizing amplitude values obtained from the lookup table. The phase signal includes phase data and specifies the quadrant and the algebraic sign of the phase data. The sine and cosine generator accessing the lookup table differently depending upon the quadrant and sine of the phase data, such that the lookup table provides an amplitude value from the sets of predefined stored values based on the phase data. A modulator combines the sine and cosine waveforms to produce the selected output digital frequency and modulates digital frequency.
摘要:
A data Interface for transferring digital data between a host and a client over a communication path using packet structures linked together to form a communication protocol for communicating a pre-selected set of digital control and presentation data. The signal protocol is used by link controllers configured to generate, transmit, and receive packets forming the communications protocol, and to form digital data into one or more types of data packets, with at least one residing in the host device and being coupled to the client through the communications path. The interface provides a cost-effective, low power, bi-directional, high-speed data transfer mechanism over a short-range “serial” type data link, which lends itself to implementation with miniature connectors and thin flexible cables which are especially useful in connecting display elements such as wearable micro-displays to portable computers and wireless communication devices.
摘要:
A data Interface for transferring digital data between a host and a client over a communication path using packet structures linked together to form a communication protocol for communicating a pre-selected set of digital control and presentation data. The signal protocol is used by link controllers configured to generate, transmit, and receive packets forming the communications protocol, and to form digital data into one or more types of data packets, with at least one residing in the host device and being coupled to the client through the communications path. The interface provides a cost-effective, low power, bi-directional, high-speed data transfer mechanism over a short-range “serial” type data link, which lends itself to implementation with miniature connectors and thin flexible cables which are especially useful in connecting display elements such as wearable micro-displays to portable computers and wireless communication devices.
摘要:
A data Interface for transferring digital data between a host and a client over a communication path using packet structures linked together to form a communication protocol for communicating a pre-selected set of digital control and presentation data. The signal protocol is used by link controllers configured to generate, transmit, and receive packets forming the communications protocol, and to form digital data into one or more types of data packets, with at least one residing in the host device and being coupled to the client through the communications path. The data interface includes a system, method and computer program for driving a data signal to a logic one state for a first predetermined range of strobe signals and then driving the data signal to a logic zero state for a second predetermined range of strobe cycles for starting up a digital data interface communication data link from hibernation.
摘要:
An integrated circuit configured for testing is described. The integrated circuit includes a high-speed input/output interface. The integrated circuit also includes a test controller coupled to the high-speed input/output interface. The integrated circuit further includes test circuitry coupled to the test controller. The test controller controls the test circuitry based on controller protocol test information from the high-speed input/output interface.