公开(公告)号：US07250780B2

公开(公告)日：2007-07-31

申请号：US10742729

申请日：2003-12-19

申请人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

发明人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

IPC分类号： G01R1/073 ,  G01R31/28

CPC分类号： G01R31/2886

摘要： A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers. The membrane can be similar to multi layered TAB tape including metal foil conductors attached to a flexible, electrically-insulating, elastomeric tape. The probe card can be configured to contact all of the dice on the wafer at the same time, so that test signals can be electronically applied to selected dice as required.

摘要翻译： 提供了用于测试半导体晶片的探针卡，以及使用探针卡测试晶片的方法和系统。 探针卡被配置用于与测试电路电气通信的常规测试装置，例如晶片探测器处理器。 探针卡包括具有用于与晶片上的接触位置建立电连通的接触构件的互连基板。 探针卡还包括用于将互连基板物理和电连接到测试装置的膜，以及用于缓冲由测试装置施加在互连基板上的压力的可压缩构件。 互连衬底可以由具有穿透突起的凸起接触构件的硅形成。 或者，接触构件可以形成为用于测试凸起的晶片的凹陷。 膜可以类似于多层TAB带，其包括附接到柔性，电绝缘的弹性体带的金属箔导体。 探针卡可以配置为同时接触晶片上的所有骰子，以便测试信号可以根据需要以电子方式应用于选定的骰子。

公开(公告)号：US6060891A

公开(公告)日：2000-05-09

申请号：US797719

申请日：1997-02-11

申请人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

发明人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

IPC分类号： G01R1/073 ,  G01R31/28

CPC分类号： G01R1/073 ,  G01R31/2886

摘要： A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers. The membrane can be similar to multi layered TAB tape including metal foil conductors attached to a flexible, electrically-insulating, elastomeric tape. The probe card can be configured to contact all of the dice on the wafer at the same time, so that test signals can be electronically applied to selected dice as required.

摘要翻译： 提供了用于测试半导体晶片的探针卡，以及使用探针卡测试晶片的方法和系统。 探针卡被配置用于与测试电路电连通的常规测试装置，例如晶片探测器处理器。 探针卡包括具有用于与晶片上的接触位置建立电连通的接触构件的互连基板。 探针卡还包括用于将互连基板物理和电连接到测试装置的膜，以及用于缓冲由测试装置施加在互连基板上的压力的可压缩构件。 互连衬底可以由具有穿透突起的凸起接触构件的硅形成。 或者，接触构件可以形成为用于测试凸起的晶片的凹陷。 膜可以类似于多层TAB带，其包括附接到柔性，电绝缘的弹性体带的金属箔导体。 探针卡可以配置为同时接触晶片上的所有骰子，以便测试信号可以根据需要以电子方式应用于选定的骰子。

公开(公告)号：US06275052B1

公开(公告)日：2001-08-14

申请号：US09303367

申请日：1999-04-30

申请人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

发明人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

IPC分类号： G01R1073

CPC分类号： G01R1/073 ,  G01R31/2886

摘要： A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers. The membrane can be similar to multi layered TAB tape including metal foil conductors attached to a flexible, electrically-insulating, elastomeric tape. The probe card can be configured to contact all of the dice on the wafer at the same time, so that test signals can be electronically applied to selected dice as required.

摘要翻译： 提供了用于测试半导体晶片的探针卡，以及使用探针卡测试晶片的方法和系统。 探针卡被配置用于与测试电路电连通的常规测试装置，例如晶片探测器处理器。 探针卡包括具有用于与晶片上的接触位置建立电连通的接触构件的互连基板。 探针卡还包括用于将互连基板物理和电连接到测试装置的膜，以及用于缓冲由测试装置施加在互连基板上的压力的可压缩构件。 互连衬底可以由具有穿透突起的凸起接触构件的硅形成。 或者，接触构件可以形成为用于测试凸起的晶片的凹陷。 膜可以类似于多层TAB带，其包括附接到柔性，电绝缘的弹性体带的金属箔导体。 探针卡可以配置为同时接触晶片上的所有骰子，以便测试信号可以根据需要以电子方式应用于选定的骰子。

公开(公告)号：US06798224B1

公开(公告)日：2004-09-28

申请号：US10072734

申请日：2002-02-05

申请人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

发明人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

IPC分类号： G01R1073

CPC分类号： G01R31/2886

摘要： A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers. The membrane can be similar to multi layered TAB tape including metal foil conductors attached to a flexible, electrically-insulating, elastomeric tape. The probe card can be configured to contact all of the dice on the wafer at the same time, so that test signals can be electronically applied to selected dice as required.

摘要翻译： 提供了用于测试半导体晶片的探针卡，以及使用探针卡测试晶片的方法和系统。 探针卡被配置用于与测试电路电连通的常规测试装置，例如晶片探测器处理器。 探针卡包括具有用于与晶片上的接触位置建立电连通的接触构件的互连基板。 探针卡还包括用于将互连基板物理和电连接到测试装置的膜，以及用于缓冲由测试装置施加在互连基板上的压力的可压缩构件。 互连衬底可以由具有穿透突起的凸起接触构件的硅形成。 或者，接触构件可以形成为用于测试凸起的晶片的凹陷。 膜可以类似于多层TAB带，其包括附接到柔性，电绝缘的弹性体带的金属箔导体。 探针卡可以配置为同时接触晶片上的所有骰子，以便测试信号可以根据需要以电子方式应用于选定的骰子。

公开(公告)号：US06359456B1

公开(公告)日：2002-03-19

申请号：US09929388

申请日：2001-08-14

申请人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

发明人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

IPC分类号： G01R1073

CPC分类号： G01R1/073 ,  G01R31/2886

摘要： A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers. The membrane can be similar to multi layered TAB tape including metal foil conductors attached to a flexible, electrically-insulating, elastomeric tape. The probe card can be configured to contact all of the dice on the wafer at the same time, so that test signals can be electronically applied to selected dice as required.

摘要翻译： 提供了用于测试半导体晶片的探针卡，以及使用探针卡测试晶片的方法和系统。 探针卡被配置用于与测试电路电连通的常规测试装置，例如晶片探测器处理器。 探针卡包括具有用于与晶片上的接触位置建立电连通的接触构件的互连基板。 探针卡还包括用于将互连基板物理和电连接到测试装置的膜，以及用于缓冲由测试装置施加在互连基板上的压力的可压缩构件。 互连衬底可以由具有穿透突起的凸起接触构件的硅形成。 或者，接触构件可以形成为用于测试凸起的晶片的凹陷。 膜可以类似于多层TAB带，其包括附接到柔性，电绝缘的弹性体带的金属箔导体。 探针卡可以配置为同时接触晶片上的所有骰子，以便测试信号可以根据需要以电子方式应用于选定的骰子。

公开(公告)号：US06356098B1

公开(公告)日：2002-03-12

申请号：US09394960

申请日：1999-09-10

申请人： Salman Akram ,  C. Patrick Doherty ,  Warren M. Farnworth ,  David R. Hembree

发明人： Salman Akram ,  C. Patrick Doherty ,  Warren M. Farnworth ,  David R. Hembree

IPC分类号： G01R3126

CPC分类号： G01R31/2886 ,  G01R1/07378

摘要： A probe card for testing a semiconductor wafer, a test method, and a test system employing the probe card are provided. The probe card includes: a substrate; patterns of pin contacts slidably mounted to the substrate; and a force applying member for biasing the pin contacts into electrical contact with die contacts on the wafer. In an illustrative embodiment the force applying member includes spring loaded electrical connectors in physical and electrical contact with the pin contacts. Alternately, the force applying member includes a compressible pad for multiple pin contacts, or separate compressible pads for each pin contact. A penetration depth of the pin contacts into the die contacts is controlled by selecting a spring force of the force applying member, and an amount of Z-direction overdrive of the pin contacts into the die contacts.

摘要翻译： 提供了用于测试半导体晶片的探针卡，测试方法和采用探针卡的测试系统。 探针卡包括：基底; 引脚触点的图案可滑动地安装到基板上; 以及用于使所述销触点偏压以与所述晶片上的芯片触点电接触的施力部件。 在示例性实施例中，施力构件包括与销触点物理和电接触的弹簧加载的电连接器。 或者，施力构件包括用于多个针接触的可压缩垫，或者每个销接触的单独的可压缩垫。 通过选择力施加部件的弹簧力来控制销接触到模具接触部中的穿透深度，并且销的Z方向过驱动量接触到模具接触件中。

公开(公告)号：US06246245B1

公开(公告)日：2001-06-12

申请号：US09027880

申请日：1998-02-23

申请人： Salman Akram ,  C. Patrick Doherty ,  Warren M. Farnworth ,  David R. Hembree

发明人： Salman Akram ,  C. Patrick Doherty ,  Warren M. Farnworth ,  David R. Hembree

IPC分类号： G01R3102

CPC分类号： G01R31/2886 ,  G01R1/07378

摘要： A probe card for testing a semiconductor wafer, a test method, and a test system employing the probe card are provided. The probe card includes: a substrate; patterns of pin contacts slidably mounted to the substrate; and a force applying member for biasing the pin contacts into electrical contact with die contacts on the wafer. In an illustrative embodiment the force applying member includes spring loaded electrical connectors in physical and electrical contact with the pin contacts. Alternately, the force applying member includes a compressible pad for multiple pin contacts, or separate compressible pads for each pin contact. A penetration depth of the pin contacts into the die contacts is controlled by selecting a spring force of the force applying member, and an amount of Z-direction overdrive of the pin contacts into the die contacts.

摘要翻译： 提供了用于测试半导体晶片的探针卡，测试方法和采用探针卡的测试系统。 探针卡包括：基底; 引脚触点的图案可滑动地安装到基板上; 以及用于使所述销触点偏压以与所述晶片上的芯片触点电接触的施力部件。 在示例性实施例中，施力构件包括与销触点物理和电接触的弹簧加载的电连接器。 或者，施力构件包括用于多个针接触的可压缩垫，或者每个销接触的单独的可压缩垫。 通过选择力施加部件的弹簧力来控制销接触到模具接触部中的穿透深度，并且销的Z方向过驱动量接触到模具接触件中。

公开(公告)号：US06433574B1

公开(公告)日：2002-08-13

申请号：US09675072

申请日：2000-09-28

申请人： C. Patrick Doherty ,  Jorge L. deVarona ,  Salman Akram

发明人： C. Patrick Doherty ,  Jorge L. deVarona ,  Salman Akram

IPC分类号： G01F3126

CPC分类号： G01R1/07385 ,  G01R1/07314 ,  G01R31/2831

摘要： An interconnect, a test system, and a test method for testing bumped semiconductor components, such as dice and packages, contained on substrates, such as wafers or panels, are provided. The test system includes the interconnect, a tester for generating test signals, and a wafer prober for placing the components and interconnect in physical contact. The interconnect includes interconnect contacts, such as conductive pockets, for electrically engaging bumped component contacts on the components. The interconnect also includes an on board multiplex circuit adapted to fan out and selectively transmit test signals from the tester to the interconnect contacts. The multiplex circuit expands tester resources by allowing test signals to be written to multiple components in parallel. Reading of the test signals from the components can be performed in groups up to the limit of the tester resources. In addition to expanding tester resources, the multiplex circuit maintains the individuality of each component, and permits defective components to be electrically disconnected.

公开(公告)号：US06300786B1

公开(公告)日：2001-10-09

申请号：US09420256

申请日：1999-10-18

申请人： C. Patrick Doherty ,  Jorge L. deVarona ,  Salman Akram

发明人： C. Patrick Doherty ,  Jorge L. deVarona ,  Salman Akram

IPC分类号： G01R3126

CPC分类号： G01R1/07385 ,  G01R1/07314 ,  G01R31/2831 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49204 ,  Y10T29/49218

摘要： A probe card, a test method and a test system for testing semiconductor wafers are provided. The test system includes the probe card, a tester for generating test signals, and a wafer prober for placing the wafers and probe card in physical contact. The probe card includes contacts for electrically engaging die contacts on the wafer. The probe card also includes an on board multiplex circuit adapted to fan out and selectively transmit test signals from the tester to the probe card contacts. The multiplex circuit expands tester resources by allowing test signals to be written to multiple dice in parallel. Reading of the dice can be performed in groups up to the limit of the tester resources. In addition to expanding tester resources, the multiplex circuit maintains the individuality of each die, and permits defective dice to be electrically disconnected.

摘要翻译： 提供了用于测试半导体晶片的探针卡，测试方法和测试系统。 测试系统包括探针卡，用于产生测试信号的测试器和用于将晶片和探针卡放置在物理接触中的晶片探测器。 探针卡包括用于电接合晶片上的裸片接触的触点。 探针卡还包括板载复用电路，其适于扇出并选择性地将测试信号从测试器传输到探针卡触点。 复用电路通过允许将测试信号并行写入多个骰子来扩展测试人员资源。 骰子的读取可以按照测试人员资源的限制进行分组。 除扩展测试仪资源之外，多路复用电路保持每个芯片的个性，并允许有缺陷的裸片电断开。

公开(公告)号：US06853211B2

公开(公告)日：2005-02-08

申请号：US10633189

申请日：2003-08-01

申请人： C. Patrick Doherty ,  Jorge L. de Varona ,  Salman Akram

发明人： C. Patrick Doherty ,  Jorge L. de Varona ,  Salman Akram

IPC分类号： G01R1/073 ,  G01R31/28 ,  G01R31/26

CPC分类号： G01R1/07385 ,  G01R1/07314 ,  G01R31/2831 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00

摘要： A system for testing semiconductor components contained on a substrate, such as a wafer, a panel, a leadframe or a module, includes an interconnect configured to electrically engage all of the components on the substrate at the same time. The interconnect includes a switching network configured to selectively apply test signals to selected components, to electrically isolate defective components and to transmit test signals from selected groups of components. The system also includes a test apparatus, such as a wafer prober or a carrier for handling the substrate. A method for testing includes the steps of providing the interconnect having the switching network, and controlling test signals to the components using the switching network to perform various test procedures, such as functionality tests, parametric tests and burn-in tests.

摘要翻译： 用于测试包含在诸如晶片，面板，引线框架或模块的基板上的半导体部件的系统包括配置为同时电连接基板上的所有部件的互连。 互连包括被配置为选择性地将测试信号应用于所选择的部件的开关网络，以电隔离有缺陷的部件并且从所选择的部件组传送测试信号。 该系统还包括诸如晶片探针或用于处理衬底的载体的测试装置。 一种用于测试的方法包括提供具有交换网络的互连的步骤，以及使用交换网络将测试信号控制到组件以执行各种测试程序，诸如功能测试，参数测试和老化测试。