Initialization of flash storage via an embedded controller

    公开(公告)号:US09245634B2

    公开(公告)日:2016-01-26

    申请号:US12621011

    申请日:2009-11-18

    申请人: Kevin M. Conley

    发明人: Kevin M. Conley

    IPC分类号: G11C16/20 G06F9/44 G06F9/445

    CPC分类号: G11C16/20 G06F9/445

    摘要: A digital system including flash memory, coupled to a system-on-a-chip within which a flash memory subsystem controller is embedded, is disclosed. The system-on-a-chip includes support for a standard external interface, such as a Universal Serial Bus (USB) or IEEE 1394 interface, to which a host system such as flash memory test equipment can connect. Initialization of the flash memory is effected by opening a communications channel between the host system and the embedded flash memory subsystem controller. The host system can then effect initialization of the flash memory subsystem, including formatting of the flash memory arrays, loading application programs, and the like, over the communications channel.

    Management of non-volatile memory systems having large erase blocks
    4.
    发明授权
    Management of non-volatile memory systems having large erase blocks 有权
    管理具有较大擦除块的非易失性存储器系统

    公开(公告)号:US08504798B2

    公开(公告)日:2013-08-06

    申请号:US10749831

    申请日:2003-12-30

    IPC分类号: G06F12/00 G06F13/00

    CPC分类号: G06F12/0246 G06F2212/7202

    摘要: A non-volatile memory system of a type having blocks of memory cells erased together and which are programmable from an erased state in units of a large number of pages per block. If the data of only a few pages of a block are to be updated, the updated pages are written into another block provided for this purpose. The valid original and updated data are then combined at a later time, when doing so does not impact on the performance of the memory. If the data of a large number of pages of a block are to be updated, however, the updated pages are written into an unused erased block and the unchanged pages are also written to the same unused block. By handling the updating of a few pages differently, memory performance is improved when small updates are being made.

    摘要翻译: 一种类型的非易失性存储器系统,其具有一起擦除的存储器单元的块,并且可以以每块的大量页面为单位从擦除状态编程。 如果要更新块的几页数据,则更新的页面被写入为此目的提供的另一个块。 然后,有效的原始和更新的数据在稍后的时间被组合,当这样做不影响存储器的性能时。 然而,如果要更新块的大量页面的数据,则更新的页面被写入未使用的擦除块,并且未改变的页面也被写入到相同的未使用的块。 通过不同的处理几页的更新,当进行小型更新时,内存性能得到改善。

    Methods of varying read threshold voltage in nonvolatile memory
    6.
    发明授权
    Methods of varying read threshold voltage in nonvolatile memory 有权
    在非易失性存储器中改变读取阈值电压的方法

    公开(公告)号:US07904788B2

    公开(公告)日:2011-03-08

    申请号:US11556615

    申请日:2006-11-03

    IPC分类号: H03M13/00

    摘要: Data is read from a nonvolatile memory array using one or more read voltages that are adjusted during memory life. Programming target voltages and read voltages may be adjusted together over memory life to map memory states to an increasingly wide threshold window. Individual memory states are mapped to sub-ranges that are made wider, reducing errors.

    摘要翻译: 使用在存储器寿命期间调整的一个或多个读取电压从非易失性存储器阵列读取数据。 编程目标电压和读取电压可以在存储器寿命中一起调整,以将存储器状态映射到越来越宽的阈值窗口。 单个内存状态映射到更广泛的子范围,从而减少错误。

    Soft-input soft-output decoder for nonvolatile memory
    7.
    发明授权
    Soft-input soft-output decoder for nonvolatile memory 有权
    用于非易失性存储器的软输入软输出解码器

    公开(公告)号:US07904783B2

    公开(公告)日:2011-03-08

    申请号:US11536327

    申请日:2006-09-28

    IPC分类号: G11C29/00 H03M13/29 H03M13/45

    摘要: In a nonvolatile memory system, data is read from a memory array and used to obtain likelihood values, which are then provided to a soft-input soft-output decoder. The soft-input soft-output decoder calculates output likelihood values from input likelihood values and from parity data that was previously added according to an encoding scheme.

    摘要翻译: 在非易失性存储器系统中,从存储器阵列中读取数据并用于获得似然值,然后提供给软输入软输出解码器。 软输入软输出解码器从输入似然值和根据编码方案先前添加的奇偶校验数据计算输出似然值。

    Flash storage system with write-erase abort detection mechanism
    10.
    发明授权
    Flash storage system with write-erase abort detection mechanism 有权
    闪存存储系统具有写擦除中止检测机制

    公开(公告)号:US07669004B2

    公开(公告)日:2010-02-23

    申请号:US11936440

    申请日:2007-11-07

    IPC分类号: G06F12/00

    摘要: The present invention presents a non-volatile memory and method for its operation that ensures reliable mechanism for write and erase abort detection in the event of lost of power during non-volatile memory programming and erasing with minimized system performance penalty. During a multi-sector write process, an indication of a successful write in one sector is written into the overhead of the following sector at the same time as the following sector's data content is written. The last sector written will additionally have an indication of its own successful write written into its overhead. For erase, an erase abort flag in the first sector of the block can be marked after a successful erase operation.

    摘要翻译: 本发明提供了一种用于其操作的非易失性存储器和方法,其确保在非易失性存储器编程和擦除期间由于在最小化的系统性能损失下的擦除而导致的写入和擦除中止检测的可靠机制。 在多扇区写入过程中,在写入下一个扇区的数据内容的同时,在一个扇区中成功写入的指示被写入下一个扇区的开销。 写入的最后一个部分将另外显示自己的成功写入写入其开销。 为了擦除,可以在成功擦除操作之后标记块的第一个扇区中的擦除中止标志。