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公开(公告)号：US07956437B2
公开(公告)日：2011-06-07
申请号：US12455212
申请日：2009-05-28
IPC分类号： H01L21/70
CPC分类号： H01L29/0646 , H01L21/26513 , H01L21/761 , H01L21/76224 , H01L21/76237 , H01L21/76243 , H01L21/76267 , H01L21/763 , H01L21/823481 , H01L21/823878 , H01L21/823892 , H01L29/0649 , H01L2924/0002 , H01L2924/00
摘要： A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be used in combination with doped sidewall isolation regions. Both the trench and the sidewall isolation regions may be annular and enclose an isolated pocket of the substrate. The isolation structures are formed by modular implant and etch processes that do not include significant thermal processing or diffusion of dopants so that the resulting structures are compact and may be tightly packed in the surface of the substrate.
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2.发明申请Isolation structures for integrated circuits and modular methods of forming the same 有权用于集成电路的隔离结构和形成其的模块化方法公开(公告)号：US20070278612A1
公开(公告)日：2007-12-06
申请号：US11444102
申请日：2006-05-31
IPC分类号： H01L29/00
CPC分类号： H01L29/0646 , H01L21/26513 , H01L21/761 , H01L21/76224 , H01L21/76237 , H01L21/76243 , H01L21/76267 , H01L21/763 , H01L21/823481 , H01L21/823878 , H01L21/823892 , H01L29/0649 , H01L2924/0002 , H01L2924/00
摘要： A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be used in combination with doped sidewall isolation regions. Both the trench and the sidewall isolation regions may be annular and enclose an isolated pocket of the substrate. The isolation structures are formed by modular implant and etch processes that do not include significant thermal processing or diffusion of dopants so that the resulting structures are compact and may be tightly packed in the surface of the substrate.
摘要翻译： 用于半导体衬底的各种隔离结构包括形成在衬底中的沟槽，其填充有电介质材料或填充有导电材料并且沿着沟槽的壁衬有介电层。 沟槽可以与掺杂的侧壁隔离区域组合使用。 沟槽和侧壁隔离区域都可以是环形的并且包围衬底的隔离袋。 隔离结构通过不包括显着的热处理或掺杂剂扩散的模块化注入和蚀刻工艺形成，使得所得到的结构是紧凑的并且可以紧密地堆积在衬底的表面中。
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公开(公告)号：US20090032876A1
公开(公告)日：2009-02-05
申请号：US12286326
申请日：2008-09-30
IPC分类号： H01L23/62
CPC分类号： H01L29/735 , H01L27/0251 , H01L29/0626 , H01L29/0692 , H01L29/7317 , H01L29/7833 , H01L29/861 , H01L29/866
摘要： An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage.
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4.发明申请High-voltage bipolar-CMOS-DMOS integrated circuit devices and modular methods of forming the same 有权高压双极CMOS-DMOS集成电路器件和模块化方法相同公开(公告)号：US20070278568A1
公开(公告)日：2007-12-06
申请号：US11443745
申请日：2006-05-31
IPC分类号： H01L29/76 , H01L21/8234
CPC分类号： H01L29/0847 , H01L21/761 , H01L21/823462 , H01L21/823481 , H01L21/823493 , H01L21/8249 , H01L27/0623 , H01L27/088 , H01L27/098 , H01L29/0696 , H01L29/0878 , H01L29/0886 , H01L29/1045 , H01L29/105 , H01L29/1083 , H01L29/1087 , H01L29/402 , H01L29/42368 , H01L29/456 , H01L29/4933 , H01L29/66106 , H01L29/66659 , H01L29/66704 , H01L29/66901 , H01L29/7825 , H01L29/7835 , H01L29/808 , H01L29/866 , H01L2924/0002 , H01L2924/00
摘要： All low-temperature processes are used to fabricate a variety of semiconductor devices in a substrate the does not include an epitaxial layer. The devices include a non-isolated lateral DMOS, a non-isolated extended drain or drifted MOS device, a lateral trench DMOS, an isolated lateral DMOS, JFET and depletion-mode devices, and P-N diode clamps and rectifiers and junction terminations. Since the processes eliminate the need for high temperature processing and employ “as-implanted” dopant profiles, they constitute a modular architecture which allows devices to be added or omitted to the IC without the necessity of altering the processes used to produce the remaining devices.
摘要翻译： 所有低温工艺都用于制造不包括外延层的衬底中的各种半导体器件。 这些器件包括非隔离的横向DMOS，非隔离的扩展漏极或漂移的MOS器件，横沟DMOS，隔离的横向DMOS，JFET和耗尽型器件以及P-N二极管钳位和整流器和结终端。 由于该工艺消除了对高温处理的需要并采用“植入式”掺杂剂分布，所以它们构成了模块化结构，其允许将器件添加或省略到IC中，而无需改变用于产生剩余器件的工艺。
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公开(公告)号：US08097522B2
公开(公告)日：2012-01-17
申请号：US11890993
申请日：2007-08-08
IPC分类号： H01L21/762
CPC分类号： H01L29/0646 , H01L21/26513 , H01L21/761 , H01L21/76224 , H01L21/76237 , H01L21/76243 , H01L21/76267 , H01L21/763 , H01L21/823481 , H01L21/823878 , H01L21/823892 , H01L29/0649 , H01L2924/0002 , H01L2924/00
摘要： A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be used in combination with doped sidewall isolation regions. Both the trench and the sidewall isolation regions may be annular and enclose an isolated pocket of the substrate. The isolation structures are formed by modular implant and etch processes that do not include significant thermal processing or diffusion of dopants so that the resulting structures are compact and may be tightly packed in the surface of the substrate.
摘要翻译： 用于半导体衬底的各种隔离结构包括形成在衬底中的沟槽，其填充有电介质材料或填充有导电材料并且沿着沟槽的壁衬有介电层。 沟槽可以与掺杂的侧壁隔离区域组合使用。 沟槽和侧壁隔离区域都可以是环形的并且包围衬底的隔离袋。 隔离结构通过不包括显着的热处理或掺杂剂扩散的模块化注入和蚀刻工艺形成，使得所得到的结构是紧凑的并且可以紧密地堆积在衬底的表面中。
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公开(公告)号：US20090034137A1
公开(公告)日：2009-02-05
申请号：US12286327
申请日：2008-09-30
CPC分类号： H01L29/735 , H01L27/0251 , H01L29/0626 , H01L29/0692 , H01L29/7317 , H01L29/7833 , H01L29/861 , H01L29/866
摘要： An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage.
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公开(公告)号：US08659086B2
公开(公告)日：2014-02-25
申请号：US12286326
申请日：2008-09-30
IPC分类号： H01L23/62
CPC分类号： H01L29/735 , H01L27/0251 , H01L29/0626 , H01L29/0692 , H01L29/7317 , H01L29/7833 , H01L29/861 , H01L29/866
摘要： An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage.
摘要翻译： 在半导体衬底的隔离区域中形成静电放电（ESD）保护器件。 ESD保护器件可以是MOS或双极晶体管或二极管的形式。 隔离结构可以包括深度植入的地板层和横向围绕隔离区域的一个或多个植入的孔。 隔离结构和ESD保护器件使用模块化工艺制造，其中几乎不包括热处理。 由于ESD器件是隔离的，所以两个或多个ESD器件可以彼此电“堆叠”，使得器件的触发电压相加在一起以实现更高的有效触发电压。
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公开(公告)号：US20090034136A1
公开(公告)日：2009-02-05
申请号：US12286325
申请日：2008-09-30
IPC分类号： H02H9/04
CPC分类号： H01L29/735 , H01L27/0251 , H01L29/0626 , H01L29/0692 , H01L29/7317 , H01L29/7833 , H01L29/861 , H01L29/866
摘要： An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage.
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9.发明申请ESD protection for bipolar-CMOS-DMOS integrated circuit devices and modular method of forming the same 有权双极CMOS-DMOS集成电路器件的ESD保护及其形成的模块化方法公开(公告)号：US20080029820A1
公开(公告)日：2008-02-07
申请号：US11499381
申请日：2006-08-04
IPC分类号： H01L23/62
CPC分类号： H01L29/735 , H01L27/0251 , H01L29/0626 , H01L29/0692 , H01L29/7317 , H01L29/7833 , H01L29/861 , H01L29/866
摘要： An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage.
摘要翻译： 在半导体衬底的隔离区域中形成静电放电（ESD）保护器件。 ESD保护器件可以是MOS或双极晶体管或二极管的形式。 隔离结构可以包括深度植入的地板层和横向围绕隔离区域的一个或多个植入的孔。 隔离结构和ESD保护器件使用模块化工艺制造，其中几乎不包括热处理。 由于ESD器件是隔离的，所以两个或多个ESD器件可以彼此电“堆叠”，使得器件的触发电压相加在一起以实现更高的有效触发电压。
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公开(公告)号：US07994578B2
公开(公告)日：2011-08-09
申请号：US12286327
申请日：2008-09-30
IPC分类号： H01L23/62
CPC分类号： H01L29/735 , H01L27/0251 , H01L29/0626 , H01L29/0692 , H01L29/7317 , H01L29/7833 , H01L29/861 , H01L29/866
摘要： An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage.
摘要翻译： 在半导体衬底的隔离区域中形成静电放电（ESD）保护器件。 ESD保护器件可以是MOS或双极晶体管或二极管的形式。 隔离结构可以包括深度植入的地板层和横向围绕隔离区域的一个或多个植入的孔。 隔离结构和ESD保护器件使用模块化工艺制造，其中几乎不包括热处理。 由于ESD器件是隔离的，所以两个或多个ESD器件可以彼此电“堆叠”，使得器件的触发电压相加在一起以实现更高的有效触发电压。
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