摘要:
A circuit generates a global clock signal with a pulse width modification to synchronize processors in a parallel computing system. The circuit may include a hardware module and a clock splitter. The hardware module may generate a clock signal and performs a pulse width modification on the clock signal. The pulse width modification changes a pulse width within a clock period in the clock signal. The clock splitter may distribute the pulse width modified clock signal to a plurality of processors in the parallel computing system.
摘要:
A circuit generates a global clock signal with a pulse width modification to synchronize processors in a parallel computing system. The circuit may include a hardware module and a clock splitter. The hardware module may generate a clock signal and performs a pulse width modification on the clock signal. The pulse width modification changes a pulse width within a clock period in the clock signal. The clock splitter may distribute the pulse width modified clock signal to a plurality of processors in the parallel computing system.
摘要:
A system, method and computer program product for supporting system initiated checkpoints in high performance parallel computing systems and storing of checkpoint data to a non-volatile memory storage device. The system and method generates selective control signals to perform checkpointing of system related data in presence of messaging activity associated with a user application running at the node. The checkpointing is initiated by the system such that checkpoint data of a plurality of network nodes may be obtained even in the presence of user applications running on highly parallel computers that include ongoing user messaging activity. In one embodiment, the non-volatile memory is a pluggable flash memory card.
摘要:
A system, method and computer program product for supporting system initiated checkpoints in high performance parallel computing systems and storing of checkpoint data to a non-volatile memory storage device. The system and method generates selective control signals to perform checkpointing of system related data in presence of messaging activity associated with a user application running at the node. The checkpointing is initiated by the system such that checkpoint data of a plurality of network nodes may be obtained even in the presence of user applications running on highly parallel computers that include ongoing user messaging activity. In one embodiment, the non-volatile memory is a pluggable flash memory card.
摘要:
A computer implemented method employs software on a system for generating a logical representation of an electronic circuit undergoing a design. A predetermined grid for the circuit being designed is selected through interaction with the user through a graphical user interface. An input file defines objects to be plotted to the grid, and is read into a computer system. Objection locations relative to the grid, and connections between objects are checked and adjustments made by moving objects as necessary to align with the grid and to ensure connections between the objects. A design file of the adjusted logical representation is written for use in completing a circuit design.
摘要:
A method and apparatus are provided for implementing interleaved-dielectric joining of multi-layer laminates. First and second multi-layer laminates are provided, each having with a laminated portion and an unlaminated portion. The first and second multi-layer laminates are joined together at the unlaminated portions by interleaving a plurality of dielectric layers of the first and second multi-layer laminates. Respective conductors carried by adjacent dielectric layers are connected. The interleaved unlaminated portions are laminated together with heat and pressure, to create a larger laminate of the joined first and second multi-layer laminates.
摘要:
A method and apparatus are provided for implementing interleaved-dielectric joining of multi-layer laminates. First and second multi-layer laminates are provided, each having with a laminated portion and an unlaminated portion. The first and second multi-layer laminates are joined together at the unlaminated portions by interleaving a plurality of dielectric layers of the first and second multi-layer laminates. Respective conductors carried by adjacent dielectric layers are connected. The interleaved unlaminated portions are laminated together with heat and pressure, to create a larger laminate of the joined first and second multi-layer laminates.
摘要:
A computer implemented method employs software on a system for generating a logical representation of an electronic circuit undergoing a design. A predetermined grid for the circuit being designed is selected through interaction with the user through a graphical user interface. An input file defines objects to be plotted to the grid, and is read into a computer system. Objection locations relative to the grid, and connections between objects are checked and adjustments made by moving objects as necessary to align with the grid and to ensure connections between the objects. A design file of the adjusted logical representation is written for use in completing a circuit design.
摘要:
A cooling apparatus, includes: one or more bimetallic deflectors attached to a mounting post, the mounting post configured for mating engagement with a protrusion of a heat sink, such that the one or more bimetallic deflectors are in thermal contact with the protrusion when the mounting post is engaged therewith; wherein the bimetallic deflectors are configured to deflect in response to thermal energy conducted from the protrusions so as to change a direction of airflow incident thereupon.