摘要:
A method of manufacturing a semiconductor memory device comprises forming floating gates on active regions of a semiconductor substrate and forming a capping layer on the floating gates. An isolation layer located in the semiconductor substrate between the floating gates is anisotropically etched using the capping layer as an etch mask to form recessed regions. The recessed regions are formed to have a width smaller than a distance between the floating gates, and bottom surfaces positioned below bottom surfaces of the floating gates. Control gate electrodes are formed across the active regions over the floating gates and the control gate electrodes have control gate extensions formed within the recessed regions between the floating gates.
摘要:
A method of manufacturing a semiconductor memory device comprises forming floating gates on active regions of a semiconductor substrate and forming a capping layer on the floating gates. An isolation layer located in the semiconductor substrate between the floating gates is anisotropically etched using the capping layer as an etch mask to form recessed regions. The recessed regions are formed to have a width smaller than a distance between the floating gates, and bottom surfaces positioned below bottom surfaces of the floating gates. Control gate electrodes are formed across the active regions over the floating gates and the control gate electrodes have control gate extensions formed within the recessed regions between the floating gates.
摘要:
Methods of fabricating a semiconductor integrated circuit device are disclosed. The methods of fabricating a semiconductor integrated circuit device include forming a hard mask layer on a base layer, forming a line sacrificial hard mask layer on the hard mask layer in a first direction, coating a high molecular organic material layer on the line sacrificial hard mask layer pattern, patterning the high molecular organic material layer and the line sacrificial hard mask layer pattern in a second direction, forming a matrix sacrificial hard mask layer pattern, forming a hard mask layer pattern by patterning the hard mask layer with the matrix sacrificial hard mask layer pattern as an etching mask and forming a lower pattern by patterning the base layer using the hard mask layer pattern as an etch mask. The method according to the invention is simpler and less expensive than conventional methods.
摘要:
A nonvolatile memory device includes a semiconductor substrate, a device isolation film, a tunnel insulation film, a plurality of floating gates, an inter-gate dielectric film, and a control gate pattern. Trenches are formed in the substrate that define active regions therebetween. The device isolation film is in the trenches in the substrate. The tunnel insulation film is on the active regions of the substrate. The plurality of floating gates are each on the tunnel insulation film over the active regions of the substrate. The inter-gate dielectric film extends across the floating gates and the device isolation film. The control gate pattern is on the inter-gate dielectric film and extends across the floating gates. A central region of the device isolation film in the trenches has an upper major surface that is recessed below an upper major surface of a surrounding region of the device isolation film in the trenches. An edge of the recessed central region of the device isolation film is aligned with a sidewall of an adjacent one of the floating gates.
摘要:
A nonvolatile memory device includes a semiconductor substrate, a device isolation film, a tunnel insulation film, a plurality of floating gates, an inter-gate dielectric film, and a control gate pattern. Trenches are formed in the substrate that define active regions therebetween. The device isolation film is in the trenches in the substrate. The tunnel insulation film is on the active regions of the substrate. The plurality of floating gates are each on the tunnel insulation film over the active regions of the substrate. The inter-gate dielectric film extends across the floating gates and the device isolation film. The control gate pattern is on the inter-gate dielectric film and extends across the floating gates. A central region of the device isolation film in the trenches has an upper major surface that is recessed below an upper major surface of a surrounding region of the device isolation film in the trenches. An edge of the recessed central region of the device isolation film is aligned with a sidewall of an adjacent one of the floating gates.
摘要:
Methods of fabricating a semiconductor device are provided. Methods of forming a finer pattern of a semiconductor device using a buffer layer for retarding, or preventing, bridge formation between patterns in the formation of a finer pattern below resolution limits of a photolithography process by double patterning are also provided. A first hard mask layer and/or a second hard mask layer may be formed on a layer of a substrate to be etched. A first etch mask pattern of a first pitch may be formed on the second hard mask layer. After a buffer layer is formed on the overall surface of the substrate, a second etch mask pattern of a second pitch may be formed thereon in a region between the first etch mask pattern. The buffer layer may be anisotropically etched using the second etch mask pattern as an etch mask, forming a buffer layer pattern. The second hard mask layer may be anisotropically etched using the first etch mask pattern and/or the buffer layer pattern as etch masks, forming a second hard mask pattern. The first hard mask layer may be anisotropically etched using the second hard mask pattern as an etch mask, forming a first hard mask pattern. The etched layer may be anisotropically etched using the first hard mask pattern as an etch mask.
摘要:
A nonvolatile memory device includes a semiconductor substrate, a device isolation film, a tunnel insulation film, a plurality of floating gates, an inter-gate dielectric film, and a control gate pattern. Trenches are formed in the substrate that define active regions therebetween. The device isolation film is in the trenches in the substrate. The tunnel insulation film is on the active regions of the substrate. The plurality of floating gates are each on the tunnel insulation film over the active regions of the substrate. The inter-gate dielectric film extends across the floating gates and the device isolation film. The control gate pattern is on the inter-gate dielectric film and extends across the floating gates. A central region of the device isolation film in the trenches has an upper major surface that is recessed below an upper major surface of a surrounding region of the device isolation film in the trenches. An edge of the recessed central region of the device isolation film is aligned with a sidewall of an adjacent one of the floating gates.
摘要:
Methods of fabricating a semiconductor device are provided. Methods of forming a finer pattern of a semiconductor device using a buffer layer for retarding, or preventing, bridge formation between patterns in the formation of a finer pattern below resolution limits of a photolithography process by double patterning are also provided. A first hard mask layer and/or a second hard mask layer may be formed on a layer of a substrate to be etched. A first etch mask pattern of a first pitch may be formed on the second hard mask layer. After a buffer layer is formed on the overall surface of the substrate, a second etch mask pattern of a second pitch may be formed thereon in a region between the first etch mask pattern. The buffer layer may be anisotropically etched using the second etch mask pattern as an etch mask, forming a buffer layer pattern. The second hard mask layer may be anisotropically etched using the first etch mask pattern and/or the buffer layer pattern as etch masks, forming a second hard mask pattern. The first hard mask layer may be anisotropically etched using the second hard mask pattern as an etch mask, forming a first hard mask pattern. The etched layer may be anisotropically etched using the first hard mask pattern as an etch mask.
摘要:
A nonvolatile memory device includes a semiconductor substrate, a device isolation film, a tunnel insulation film, a plurality of floating gates, an inter-gate dielectric film, and a control gate pattern. Trenches are formed in the substrate that define active regions therebetween. The device isolation film is in the trenches in the substrate. The tunnel insulation film is on the active regions of the substrate. The plurality of floating gates are each on the tunnel insulation film over the active regions of the substrate. The inter-gate dielectric film extends across the floating gates and the device isolation film. The control gate pattern is on the inter-gate dielectric film and extends across the floating gates. A central region of the device isolation film in the trenches has an upper major surface that is recessed below an upper major surface of a surrounding region of the device isolation film in the trenches. An edge of the recessed central region of the device isolation film is aligned with a sidewall of an adjacent one of the floating gates.
摘要:
A method of removing metal-containing polymeric material and ion implanted or plasma damaged photoresist from a surface using a plasma jet system, by generating radicals having high energy and high density from atmospheric plasma by introducing a reactant gas to the plasma, and placing the surface at a distance from the plasma, whereby ionic reaction on the surface is minimized while the removing action of the radicals on the surface is maintained.