公开(公告)号：US20090008638A1

公开(公告)日：2009-01-08

申请号：US12078706

申请日：2008-04-03

Applicant: Dong-hun Kang ,  I-hun Song ,  Young-soo Park ,  Chang-jung Kim ,  Eun-ha Lee ,  Jae-cheol Lee

Inventor： Dong-hun Kang ,  I-hun Song ,  Young-soo Park ,  Chang-jung Kim ,  Eun-ha Lee ,  Jae-cheol Lee

IPC: H01L29/12 ,  H01L21/336

CPC classification number: H01L29/7869

Abstract: Example embodiments relate to an oxide semiconductor including zinc oxide (ZnO), a thin film transistor including a channel formed of the oxide semiconductor and a method of manufacturing the thin film transistor. The oxide semiconductor may include a GaxInyZnz oxide and at least one material selected from the group consisting of a 4A group element, a 4A group oxide, a rare earth element and combinations thereof.

Abstract translation: 示例性实施例涉及包括氧化锌（ZnO），包括由氧化物半导体形成的沟道的薄膜晶体管的氧化物半导体和制造薄膜晶体管的方法。 氧化物半导体可以包括GaxInyZnz氧化物和选自由4A族元素，4A族氧化物，稀土元素及其组合组成的组中的至少一种材料。

公开(公告)号：US20070246784A1

公开(公告)日：2007-10-25

申请号：US11212582

申请日：2005-08-29

Applicant: Dong-hun Kang ,  Noe-jung Park ,  Wan-jun Park

Inventor： Dong-hun Kang ,  Noe-jung Park ,  Wan-jun Park

IPC: H01L29/76

CPC classification number: H01L51/0545 ,  B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/1033 ,  H01L51/0048 ,  H01L51/0558

Abstract: An ambipolar nanotube field effect transistor is converted to a unipolar nanotube field effect transistor by providing a carrier-trapping material such as oxygen molecules for the nanotube such as by adsorption or by providing a layer of material containing the carrier-trapping material adjacent to the nanotube.

Abstract translation: 通过为纳米管提供诸如氧分子的载流子捕获材料，例如通过吸附或者通过提供包含与纳米管相邻的载流子俘获材料的材料层，将双极纳米管场效应晶体管转换为单极纳米管场效应晶体管 。

公开(公告)号：US20060091440A1

公开(公告)日：2006-05-04

申请号：US11221864

申请日：2005-09-09

Applicant: Noe-jung Park ,  Kwang-hee Kim ,  Dong-hun Kang ,  Jae-woong Hyun ,  Ki-ha Hong

Inventor： Noe-jung Park ,  Kwang-hee Kim ,  Dong-hun Kang ,  Jae-woong Hyun ,  Ki-ha Hong

IPC: H01L29/94

CPC classification number: G11C13/0014 ,  B82Y10/00 ,  G11C13/02 ,  G11C13/025 ,  H01L51/002 ,  H01L51/0048 ,  H01L51/0051 ,  H01L51/0512 ,  H01L51/052 ,  H01L51/0525 ,  Y10S977/742

Abstract: Provided is a memory device comprising a molecular adsorption layer. The memory device includes: a substrate; a source electrode and a drain electrode formed on the substrate and separated from each other; a carbon nanotube (CNT) layer electrically connected to the source electrode and the drain electrode; a memory cell contacting the CNT so as to store a charge from the CNT; and a gate electrode formed on the memory cell, wherein the memory cell comprises: a first insulating layer formed on the CNT; a molecular adsorption layer which is formed on the first insulating layer and acts as a charge storage layer; and a second insulating layer formed on the molecular adsorption layer.

Abstract translation: 提供了包含分子吸附层的记忆装置。 存储器件包括：衬底; 源电极和漏电极，形成在基板上并彼此分离; 电连接到源电极和漏电极的碳纳米管（CNT）层; 与CNT接触以存储来自CNT的电荷的存储单元; 以及形成在所述存储单元上的栅电极，其中所述存储单元包括：形成在所述CNT上的第一绝缘层; 分子吸附层，其形成在第一绝缘层上并用作电荷存储层; 以及形成在分子吸附层上的第二绝缘层。

公开(公告)号：USD396816S

公开(公告)日：1998-08-11

申请号：US78340

申请日：1997-10-21

Applicant: Dong-hun Kang

Designer： Dong-hun Kang

公开(公告)号：US08421070B2

公开(公告)日：2013-04-16

申请号：US12929324

申请日：2011-01-14

Applicant: Chang-jung Kim ,  I-hun Song ,  Dong-hun Kang ,  Young-soo Park

Inventor： Chang-jung Kim ,  I-hun Song ,  Dong-hun Kang ,  Young-soo Park

IPC: H01L29/12

CPC classification number: H01L29/7869

Abstract: A semiconductor device may include a composite represented by Formula 1 below as an active layer. x(Ga2O3).y(In2O3).z(ZnO)  Formula 1 wherein, about 0.75≦x/z≦about 3.15, and about 0.55≦y/z≦about 1.70. Switching characteristics of displays and driving characteristics of driving transistors may be improved by adjusting the amounts of a gallium (Ga) oxide and an indium (In) oxide mixed with a zinc (Zn) oxide and improving optical sensitivity.

Abstract translation: 半导体器件可以包括由下面的式1表示的复合物作为有源层。 x（Ga 2 O 3）y（In 2 O 3）z（ZnO）式1其中约0.75＆lt; lE; x / z＆nlE;约3.15和约0.55≤n1E; y /z≤n1E;约1.70。 可以通过调节与锌（Zn）氧化物混合的镓（Ga）氧化物和铟（In））的量来提高驱动晶体管的开关特性并提高光学灵敏度。

公开(公告)号：US08063421B2

公开(公告)日：2011-11-22

申请号：US12007038

申请日：2008-01-04

Applicant: Dong-hun Kang ,  Stefanovich Genrikh ,  I-hun Song ,  Young-soo Park ,  Chang-jung Kim

Inventor： Dong-hun Kang ,  Stefanovich Genrikh ,  I-hun Song ,  Young-soo Park ,  Chang-jung Kim

IPC: H01L31/062 ,  H01L31/113

CPC classification number: H01L29/7869

Abstract: Provided are a thin film transistor and a method of manufacturing the same. The thin film transistor may include a gate; a channel layer; a source and a drain, the source and the drain being formed of metal; and a metal oxide layer, the metal oxide layer being formed between the channel layer and the source and the drain. The metal oxide layer may have a gradually changing metal content between the channel layer and the source and the drain.

Abstract translation: 提供一种薄膜晶体管及其制造方法。 薄膜晶体管可以包括栅极; 一个通道层; 源极和漏极，源极和漏极由金属形成; 和金属氧化物层，金属氧化物层形成在沟道层与源极和漏极之间。 金属氧化物层可以在沟道层和源极和漏极之间具有逐渐变化的金属含量。

公开(公告)号：US20080277663A1

公开(公告)日：2008-11-13

申请号：US11984072

申请日：2007-11-13

Applicant: Dong-hun Kang ,  I-hun Song ,  Elvira Fortunato ,  Rodrigo Martins

Inventor： Dong-hun Kang ,  I-hun Song ,  Elvira Fortunato ,  Rodrigo Martins

IPC: H01L29/10 ,  H01L21/84

CPC classification number: H01L29/7869 ,  H01L29/78606

Abstract: Provided is a thin film transistor that includes a substrate on which an insulating layer is formed, a gate formed on a region of the insulating layer, a gate insulating layer formed on the insulating layer and the gate, a channel region formed on the gate insulating layer on a region corresponding to the location of the gate, a source and a drain respectively formed by contacting either side of the channel region; and a passivation layer formed of a compound made of a group II element and a halogen element on the channel region.

Abstract translation: 提供一种薄膜晶体管，其包括其上形成有绝缘层的基板，形成在绝缘层的区域上的栅极，形成在绝缘层上的栅极绝缘层和栅极，形成在栅极绝缘上的沟道区域 在对应于栅极的位置的区域上分别形成一个源极和漏极，该漏极和漏极分别通过与沟道区域的任一侧接触; 以及由沟道区域上由II族元素和卤素元素制成的化合物形成的钝化层。

公开(公告)号：US20080258140A1

公开(公告)日：2008-10-23

申请号：US11978581

申请日：2007-10-30

Applicant: Eun-ha Lee ,  Dong-hun Kang ,  Jae-cheol Lee ,  Chang-jung Kim ,  Hyuck Lim

Inventor： Eun-ha Lee ,  Dong-hun Kang ,  Jae-cheol Lee ,  Chang-jung Kim ,  Hyuck Lim

IPC: H01L29/04 ,  H01L21/34

CPC classification number: H01L29/7869 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02667 ,  H01L21/02672 ,  H01L21/02675

Abstract: Provided are a thin film transistor (TFT) including a selectively crystallized channel layer, and a method of manufacturing the TFT. The TFT includes a gate, the channel layer, a source, and a drain. The channel layer is formed of an oxide semiconductor, and at least a portion of the channel layer contacting the source and the drain is crystallized. In the method of manufacturing the TFT, the channel layer is formed of an oxide semiconductor, and a metal component is injected into the channel layer so as to crystallize at least a portion of the channel layer contacting the source and the drain. The metal component can be injected into the channel layer by depositing and heat-treating a metal layer or by ion-implantation.

Abstract translation: 提供了包括选择性晶化的沟道层的薄膜晶体管（TFT）和制造TFT的方法。 TFT包括栅极，沟道层，源极和漏极。 沟道层由氧化物半导体形成，并且与源极和漏极接触的沟道层的至少一部分结晶。 在制造TFT的方法中，沟道层由氧化物半导体形成，并且将金属成分注入到沟道层中，以便使与沟道层和漏极接触的沟道层的至少一部分结晶。 可以通过沉积和热处理金属层或通过离子注入将金属成分注入到沟道层中。

公开(公告)号：US07332740B2

公开(公告)日：2008-02-19

申请号：US11221864

申请日：2005-09-09

Applicant: Noe-jung Park ,  Kwang-hee Kim ,  Dong-hun Kang ,  Jae-woong Hyun ,  Ki-ha Hong

Inventor： Noe-jung Park ,  Kwang-hee Kim ,  Dong-hun Kang ,  Jae-woong Hyun ,  Ki-ha Hong

IPC: H01L35/24 ,  H01L51/00

CPC classification number: G11C13/0014 ,  B82Y10/00 ,  G11C13/02 ,  G11C13/025 ,  H01L51/002 ,  H01L51/0048 ,  H01L51/0051 ,  H01L51/0512 ,  H01L51/052 ,  H01L51/0525 ,  Y10S977/742

Abstract: Provided is a memory device comprising a molecular adsorption layer. The memory device includes: a substrate; a source electrode and a drain electrode formed on the substrate and separated from each other; a carbon nanotube (CNT) layer electrically connected to the source electrode and the drain electrode; a memory cell contacting the CNT so as to store a charge from the CNT; and a gate electrode formed on the memory cell, wherein the memory cell comprises: a first insulating layer formed on the CNT; a molecular adsorption layer which is formed on the first insulating layer and acts as a charge storage layer; and a second insulating layer formed on the molecular adsorption layer.

Abstract translation: 提供了包含分子吸附层的记忆装置。 存储器件包括：衬底; 源电极和漏电极，形成在基板上并彼此分离; 电连接到源电极和漏电极的碳纳米管（CNT）层; 与CNT接触以存储来自CNT的电荷的存储单元; 以及形成在所述存储单元上的栅电极，其中所述存储单元包括：形成在所述CNT上的第一绝缘层; 分子吸附层，其形成在第一绝缘层上并用作电荷存储层; 以及形成在分子吸附层上的第二绝缘层。

公开(公告)号：US08735882B2

公开(公告)日：2014-05-27

申请号：US12929323

申请日：2011-01-14

Applicant: Chang-jung Kim ,  I-hun Song ,  Dong-hun Kang ,  Young-soo Park

Inventor： Chang-jung Kim ,  I-hun Song ,  Dong-hun Kang ,  Young-soo Park

IPC: H01L29/12

CPC classification number: H01L29/7869

Abstract: A semiconductor device may include a composite represented by Formula 1 below as an active layer. x(Ga2O3).y(In2O3).z(ZnO)  Formula 1 wherein, about 0.75≦x/z≦about 3.15, and about 0.55≦y/z≦ about 1.70. Switching characteristics of displays and driving characteristics of driving transistors may be improved by adjusting the amounts of a gallium (Ga) oxide and an indium (In) oxide mixed with a zinc (Zn) oxide and improving optical sensitivity.

Abstract translation: 半导体器件可以包括由下面的式1表示的复合物作为有源层。 x（Ga 2 O 3）y（In 2 O 3）z（ZnO）式1其中约0.75＆lt; lE; x / z和nlE;约3.15和约0.55≤n1E; y / z＆ 约1.70。 可以通过调节与锌（Zn）氧化物混合的镓（Ga）氧化物和铟（In））的量来提高驱动晶体管的开关特性并提高光学灵敏度。