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    Memory device having molecular adsorption layer
    1.
    发明授权
    Memory device having molecular adsorption layer 有权
    具有分子吸附层的记忆装置

    公开(公告)号：US07332740B2

    公开(公告)日：2008-02-19

    申请号：US11221864

    申请日：2005-09-09

    申请人： Noe-jung Park ,  Kwang-hee Kim ,  Dong-hun Kang ,  Jae-woong Hyun ,  Ki-ha Hong

    发明人： Noe-jung Park ,  Kwang-hee Kim ,  Dong-hun Kang ,  Jae-woong Hyun ,  Ki-ha Hong

    IPC分类号： H01L35/24 ,  H01L51/00

    CPC分类号： G11C13/0014 ,  B82Y10/00 ,  G11C13/02 ,  G11C13/025 ,  H01L51/002 ,  H01L51/0048 ,  H01L51/0051 ,  H01L51/0512 ,  H01L51/052 ,  H01L51/0525 ,  Y10S977/742

    摘要： Provided is a memory device comprising a molecular adsorption layer. The memory device includes: a substrate; a source electrode and a drain electrode formed on the substrate and separated from each other; a carbon nanotube (CNT) layer electrically connected to the source electrode and the drain electrode; a memory cell contacting the CNT so as to store a charge from the CNT; and a gate electrode formed on the memory cell, wherein the memory cell comprises: a first insulating layer formed on the CNT; a molecular adsorption layer which is formed on the first insulating layer and acts as a charge storage layer; and a second insulating layer formed on the molecular adsorption layer.

    摘要翻译： 提供了包含分子吸附层的记忆装置。 存储器件包括：衬底; 源电极和漏电极，形成在基板上并彼此分离; 电连接到源电极和漏电极的碳纳米管（CNT）层; 与CNT接触以存储来自CNT的电荷的存储单元; 以及形成在所述存储单元上的栅电极，其中所述存储单元包括：形成在所述CNT上的第一绝缘层; 分子吸附层，其形成在第一绝缘层上并用作电荷存储层; 以及形成在分子吸附层上的第二绝缘层。

    Memory device having molecular adsorption layer
    2.
    发明申请
    Memory device having molecular adsorption layer 有权
    具有分子吸附层的记忆装置

    公开(公告)号：US20060091440A1

    公开(公告)日：2006-05-04

    申请号：US11221864

    申请日：2005-09-09

    申请人： Noe-jung Park ,  Kwang-hee Kim ,  Dong-hun Kang ,  Jae-woong Hyun ,  Ki-ha Hong

    发明人： Noe-jung Park ,  Kwang-hee Kim ,  Dong-hun Kang ,  Jae-woong Hyun ,  Ki-ha Hong

    IPC分类号： H01L29/94

    CPC分类号： G11C13/0014 ,  B82Y10/00 ,  G11C13/02 ,  G11C13/025 ,  H01L51/002 ,  H01L51/0048 ,  H01L51/0051 ,  H01L51/0512 ,  H01L51/052 ,  H01L51/0525 ,  Y10S977/742

    摘要： Provided is a memory device comprising a molecular adsorption layer. The memory device includes: a substrate; a source electrode and a drain electrode formed on the substrate and separated from each other; a carbon nanotube (CNT) layer electrically connected to the source electrode and the drain electrode; a memory cell contacting the CNT so as to store a charge from the CNT; and a gate electrode formed on the memory cell, wherein the memory cell comprises: a first insulating layer formed on the CNT; a molecular adsorption layer which is formed on the first insulating layer and acts as a charge storage layer; and a second insulating layer formed on the molecular adsorption layer.

    摘要翻译： 提供了包含分子吸附层的记忆装置。 存储器件包括：衬底; 源电极和漏电极，形成在基板上并彼此分离; 电连接到源电极和漏电极的碳纳米管（CNT）层; 与CNT接触以存储来自CNT的电荷的存储单元; 以及形成在所述存储单元上的栅电极，其中所述存储单元包括：形成在所述CNT上的第一绝缘层; 分子吸附层，其形成在第一绝缘层上并用作电荷存储层; 以及形成在分子吸附层上的第二绝缘层。

    Non-volatile memory device including block state confirmation cell and method of operating the same
    10.
    发明申请
    Non-volatile memory device including block state confirmation cell and method of operating the same 审中-公开
    包括块状态确认单元的非易失性存储器件及其操作方法

    公开(公告)号：US20120026790A1

    公开(公告)日：2012-02-02

    申请号：US13137668

    申请日：2011-09-01

    申请人： Ju-hee Park ,  Jae-woong Hyun ,  Kyoung-lae Cho ,  Yoon-dong Park ,  Seung-hoon Lee ,  Kee-won Kwon

    发明人： Ju-hee Park ,  Jae-woong Hyun ,  Kyoung-lae Cho ,  Yoon-dong Park ,  Seung-hoon Lee ,  Kee-won Kwon

    IPC分类号： G11C16/10 ,  G11C16/06 ,  G11C16/04

    CPC分类号： G11C11/5642 ,  G11C2211/5641 ,  G11C2211/5646

    摘要： Provided are a semiconductor device having a block state confirmation cell that may store information indicating the number of data bits written to a plurality of memory cells, a method of reading memory data based on the number of the data bits written, and/or a memory programming method of storing the information indicating the number of the data bits written. The semiconductor device may include one or more memory blocks and a controller. Each of the memory blocks may include a plurality of memory cells each storing data, and a block state confirmation cell storing information indicating the number of data bits written to the memory cells. The controller may read the data bits from the memory blocks based on the number of data bits, which is indicated in the information in the block state confirmation cell.

    摘要翻译： 提供了具有块状态确认单元的半导体器件，其可以存储指示写入多个存储器单元的数据位数的信息，基于写入的数据位的数量读取存储器数据的方法和/或存储器 存储指示写入数据位数的信息的编程方法。 半导体器件可以包括一个或多个存储器块和控制器。 每个存储器块可以包括存储数据的多个存储单元，以及存储指示写入存储单元的数据位数的信息的块状态确认单元。 控制器可以基于在块状态确认单元中的信息中指示的数据位数来从存储器块读取数据位。