-
公开(公告)号：US07622961B2
公开(公告)日：2009-11-24
申请号：US11234548
申请日：2005-09-23
IPC分类号： H03K5/19
CPC分类号： G01R31/31922 , G01R31/31726 , H03K5/1534 , H04L7/0083 , H04L7/033
摘要： Two latches store the state of a data signal at a transition of a clock signal. Comparison logic compares the outputs of the two latches and produces a signal to indicate whether the outputs are equal or unequal. Systems using the latches and comparison logic are described and claimed.
摘要翻译： 两个锁存器在时钟信号的转变时存储数据信号的状态。 比较逻辑比较两个锁存器的输出，并产生一个信号以指示输出是相等还是不相等。 描述和要求保护使用锁存器和比较逻辑的系统。
-
公开(公告)号：US08125246B2
公开(公告)日：2012-02-28
申请号：US12618629
申请日：2009-11-13
IPC分类号： H03K19/096
CPC分类号： G01R31/31922 , G01R31/31726 , H03K5/1534 , H04L7/0083 , H04L7/033
摘要： Two latches store the state of a data signal at a transition of a clock signal. Comparison logic compares the outputs of the two latches and produces a signal to indicate whether the outputs are equal or unequal. Systems using the latches and comparison logic are described and claimed.
摘要翻译： 两个锁存器在时钟信号的转变时存储数据信号的状态。 比较逻辑比较两个锁存器的输出，并产生一个信号以指示输出是相等还是不相等。 描述和要求保护使用锁存器和比较逻辑的系统。
-
公开(公告)号：US20100052730A1
公开(公告)日：2010-03-04
申请号：US12618629
申请日：2009-11-13
IPC分类号： H03K5/19
CPC分类号： G01R31/31922 , G01R31/31726 , H03K5/1534 , H04L7/0083 , H04L7/033
摘要： Two latches store the state of a data signal at a transition of a clock signal. Comparison logic compares the outputs of the two latches and produces a signal to indicate whether the outputs are equal or unequal. Systems using the latches and comparison logic are described and claimed.
摘要翻译： 两个锁存器在时钟信号的转变时存储数据信号的状态。 比较逻辑比较两个锁存器的输出，并产生一个信号以指示输出是相等还是不相等。 描述和要求保护使用锁存器和比较逻辑的系统。
-
4.发明授权公开(公告)号：US07480838B1
公开(公告)日：2009-01-20
申请号：US11388668
申请日：2006-03-23
IPC分类号： G06K5/04
CPC分类号： G06F11/0751 , G06F11/0724 , G06F11/0772 , G06F11/1497
摘要： Methods and systems to facilitate an efficient circuit for detecting internal timing errors for integrated devices, including a hierarchy of reporting the detection of the timing error from a circuit level to a functional unit block (FUB) level up to a global detection, and a reorder buffer (ROB) for storing a result for timing error recovery until the timing can be verified to be error free.
摘要翻译： 包括用于报告从电路电平到功能单元块（FUB）到全局检测的定时误差检测的层次结构的集成设备的检测内部定时误差的有效电路的方法和系统以及重新排序 缓冲器（ROB），用于存储用于定时错误恢复的结果，直到定时可被验证为无错误。
-
公开(公告)号：US20070164787A1
公开(公告)日：2007-07-19
申请号：US11234548
申请日：2005-09-23
IPC分类号： H03K19/173 , G06F7/38
CPC分类号： G01R31/31922 , G01R31/31726 , H03K5/1534 , H04L7/0083 , H04L7/033
摘要： Two latches store the state of a data signal at a transition of a clock signal. Comparison logic compares the outputs of the two latches and produces a signal to indicate whether the outputs are equal or unequal. Systems using the latches and comparison logic are described and claimed.
摘要翻译： 两个锁存器在时钟信号的转变时存储数据信号的状态。 比较逻辑比较两个锁存器的输出，并产生一个信号以指示输出是相等还是不相等。 描述和要求保护使用锁存器和比较逻辑的系统。
-
6.发明申请Method and apparatus for varying energy per instruction according to the amount of available parallelism 有权根据可用的并行度量来改变每个指令的能量的方法和装置公开(公告)号：US20060095807A1
公开(公告)日：2006-05-04
申请号：US10952627
申请日：2004-09-28
申请人： Edward Grochowski , John Shen , Hong Wang , Doron Orenstein , Gad Sheaffer , Ronny Ronen , Murali Annavaram
发明人： Edward Grochowski , John Shen , Hong Wang , Doron Orenstein , Gad Sheaffer , Ronny Ronen , Murali Annavaram
IPC分类号： G06F1/30
CPC分类号： G06F9/3851 , G06F1/206 , G06F1/3203 , G06F1/329 , G06F9/3885 , G06F9/3891 , G06F9/3897 , Y02D10/16 , Y02D10/24 , Y02D50/20
摘要： A method and apparatus for changing the configuration of a multi-core processor is disclosed. In one embodiment, a throttle module (or throttle logic) may determine the amount of parallelism present in the currently-executing program, and change the execution of the threads of that program on the various cores. If the amount of parallelism is high, then the processor may be configured to run a larger amount of threads on cores configured to consume less power. If the amount of parallelism is low, then the processor may be configured to run a smaller amount of threads on cores configured for greater scalar performance.
摘要翻译： 公开了一种用于改变多核处理器的配置的方法和装置。 在一个实施例中，节气门模块（或节气门逻辑）可以确定当前执行的程序中存在的并行度量，并且改变该程序在各种核心上的线程的执行。 如果并行量高，则处理器可以被配置为在被配置为消耗较少功率的核上运行更大量的线程。 如果并行量较低，则处理器可能被配置为在配置为更高标量性能的核心上运行较少量的线程。
-
7.发明授权Methods, apparatuses, and computer program products for traffic data aggregation using virtual trip lines and a combination of location and time based measurement triggers in GPS-enabled mobile handsets 有权用于使用虚拟跳闸线路进行交通数据聚合的方法，设备和计算机程序产品以及支持GPS的移动手机中基于位置和时间的测量触发的组合公开(公告)号：US07912629B2
公开(公告)日：2011-03-22
申请号：US12119943
申请日：2008-05-13
IPC分类号： G06F19/00
CPC分类号： G08G1/0104 , G08G1/207
摘要： A device for determining the traffic conditions between measurement locations associated with a roadway is provided. The device includes a processor that is capable of determining when a specified measurement location is passed or traversed and measure data as well as start a time period. If a device is traveling towards another specified measurement location but does not reach the location before the time period expires, a new measurement update may be sent by the device to a server. The information in this update may be utilized by the server to determine that there is a slowdown or blockage in traffic and/or that there is a traffic jam between the measurement locations. The device is capable of receiving a traffic update(s) from the server which may specify traffic conditions between the measurement locations. The traffic conditions may indicate that there is a traffic slowdown/blockage between the measurement locations.
摘要翻译： 提供了一种用于确定与道路相关联的测量位置之间的交通状况的装置。 该设备包括能够确定何时通过或遍历指定的测量位置的处理器，并且测量数据以及开始一段时间。 如果设备前往另一个指定的测量位置，但是在该时间段到期之前没有到达该位置，那么该设备可能会向服务器发送新的测量更新。 该更新中的信息可被服务器利用以确定业务中存在减速或阻塞和/或测量位置之间存在交通堵塞。 该设备能够从服务器接收可能指定测量位置之间的交通状况的交通更新。 交通状况可能表明测量位置之间存在交通减速/阻塞。
-
8.发明授权Methods, apparatuses, and computer program product for traffic data aggregation using virtual trip lines and GPS-enabled mobile handsets 有权使用虚拟跳闸线路和启用GPS的手机进行交通数据聚合的方法，设备和计算机程序产品公开(公告)号：US07818114B2
公开(公告)日：2010-10-19
申请号：US11948779
申请日：2007-11-30
申请人： Quinn Jacobson , Baik Hoh , Murali Annavaram
发明人： Quinn Jacobson , Baik Hoh , Murali Annavaram
IPC分类号： G06F19/00
CPC分类号： G08G1/0104 , G08G1/052
摘要： A device for determining when a virtual trip line has been crossed or traversed is provided. The device includes a memory for storing the virtual trip lines which are defined pairs of location descriptors corresponding to a geographic area. The device further includes a processor that is capable of determining the location of the device when it crosses a virtual trip line as well as its speed and direction. The processing element is further capable of sending this information to another electronic device such as a server that may determine a number of vehicles crossing a virtual trip line for a specified amount of time, the average speed of vehicles crossing the virtual trip line and the traffic density in a region near the virtual trip line. The device is capable of receiving the information that was determined by the server.
摘要翻译： 提供了一种用于确定虚拟跳闸线何时已被越过或穿过的装置。 该设备包括用于存储虚拟跳闸线的存储器，虚拟跳闸线是对应于地理区域的定义的位置描述符对。 该设备还包括处理器，其能够在穿过虚拟跳闸线以及其速度和方向时确定设备的位置。 处理元件还能够将该信息发送到诸如可以确定跨越虚拟跳闸线路的车辆数量达指定时间量的其他电子设备，穿过虚拟跳闸线路的车辆的平均速度和交通 在虚拟跳闸线附近的区域的密度。 该设备能够接收由服务器确定的信息。
-
公开(公告)号：US20070220207A1
公开(公告)日：2007-09-20
申请号：US11374936
申请日：2006-03-14
申请人： Bryan Black , Murali Annavaram , Paul Reed
发明人： Bryan Black , Murali Annavaram , Paul Reed
IPC分类号： G06F12/00
CPC分类号： G06F12/084 , G06F12/0862 , G06F12/0897 , Y02D10/13
摘要： Methods and apparatus to transfer data from a stacked memory are described. In one embodiment, an interconnect may be utilized to transfer data into a buffer from one or more opened memory pages.
摘要翻译： 描述了从堆叠存储器传送数据的方法和装置。 在一个实施例中，互连可用于从一个或多个打开的存储器页面将数据传送到缓冲器。
-
10.发明申请METHODS, APPARATUSES, AND COMPUTER PROGRAM PRODUCT FOR TRAFFIC DATA AGGREGATION USING VIRTUAL TRIP LINES AND GPS-ENABLED MOBILE HANDSETS 有权方法，装置和计算机程序产品，用于使用虚拟行车线和GPS启动手机的交通数据聚合公开(公告)号：US20090143966A1
公开(公告)日：2009-06-04
申请号：US11948779
申请日：2007-11-30
申请人： Quinn Jacobson , Baik Hoh , Murali Annavaram
发明人： Quinn Jacobson , Baik Hoh , Murali Annavaram
CPC分类号： G08G1/0104 , G08G1/052
摘要： A device for determining when a virtual trip line has been crossed or traversed is provided. The device includes a memory for storing the virtual trip lines which are defined pairs of location descriptors corresponding to a geographic area. The device further includes a processor that is capable of determining the location of the device when it crosses a virtual trip line as well as its speed and direction. The processing element is further capable of sending this information to another electronic device such as a server that may determine a number of vehicles crossing a virtual trip line for a specified amount of time, the average speed of vehicles crossing the virtual trip line and the traffic density in a region near the virtual trip line. The device is capable of receiving the information that was determined by the server.
摘要翻译： 提供了一种用于确定虚拟跳闸线何时已被越过或穿过的装置。 该设备包括用于存储虚拟跳闸线的存储器，虚拟跳闸线是对应于地理区域的定义的位置描述符对。 该设备还包括处理器，其能够在穿过虚拟跳闸线以及其速度和方向时确定设备的位置。 处理元件还能够将该信息发送到诸如可以确定跨越虚拟跳闸线路的车辆数量达指定时间量的其他电子设备，穿过虚拟跳闸线路的车辆的平均速度和交通 在虚拟跳闸线附近的区域的密度。 该设备能够接收由服务器确定的信息。
-
-
-
-
-
-
-
-
-
搜索结果
18 条记录 (耗时 0.026 秒)
