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    ENERGY AND AREA OPTIMIZED HETEROGENEOUS MULTIPROCESSOR FOR CASCADE CLASSIFIERS
    1.
    发明申请
    ENERGY AND AREA OPTIMIZED HETEROGENEOUS MULTIPROCESSOR FOR CASCADE CLASSIFIERS 审中-公开
    能源和区域优化分类器的异构多重分配器

    公开(公告)号：US20160275043A1

    公开(公告)日：2016-09-22

    申请号：US14662089

    申请日：2015-03-18

    申请人： Edward T. Grochowski ,  Michael E. Kounavis ,  Ron Shalev

    发明人： Edward T. Grochowski ,  Michael E. Kounavis ,  Ron Shalev

    IPC分类号： G06F15/80 ,  G06F9/38

    CPC分类号： G06F9/3887 ,  G06F9/3836 ,  G06F9/3867 ,  G06F9/3869 ,  G06F9/3885

    摘要： In one embodiment, a heterogeneous multicore processor is described that is optimized to execute multi-stage computer vision algorithms such as cascade classifier workloads. In such embodiment the heterogeneous processor includes at least one SIMD core, such as a vector processor core, coupled with one or more scalar cores. In one embodiment the heterogeneous multiprocessor executes multi-stage compute operations, where the SIMD core computes a first set of stages and the one or more scalar cores compute the second set of stages. In one embodiment, a process for designing a heterogeneous multicore processor is disclosed which optimizes the ratio of scalar to SIMD cores based on execution time of the multi-stage compute operation in relation to processor die area consumed by a processor configuration having the ratio.

    摘要翻译： 在一个实施例中，描述了被优化以执行诸如级联分类器工作负载的多级计算机视觉算法的异构多核处理器。 在这种实施例中，异构处理器包括与一个或多个标量核耦合的至少一个SIMD核，例如向量处理器核。 在一个实施例中，异构多处理器执行多阶段计算操作，其中SIMD核心计算第一组阶段，并且一个或多个标量核心计算第二组阶段。 在一个实施例中，公开了一种用于设计异构多核处理器的过程，其基于多级计算操作的执行时间相对于具有该比率的处理器配置消耗的处理器管芯面积来优化标量到SIMD核的比率。

    Method and apparatus for multiplying polynomials with a prime number of terms
    5.
    发明授权
    Method and apparatus for multiplying polynomials with a prime number of terms 有权
    将多项式与素数项相乘的方法和装置

    公开(公告)号：US08478809B2

    公开(公告)日：2013-07-02

    申请号：US11957450

    申请日：2007-12-15

    申请人： Vinodh Gopal ,  Michael E. Kounavis

    发明人： Vinodh Gopal ,  Michael E. Kounavis

    IPC分类号： G06F7/523

    CPC分类号： G06F7/552 ,  G06F7/5324 ,  G06F7/724 ,  G06F2207/5523

    摘要： An efficient method and apparatus to compute a product of polynomials of degree n−1 where n is an arbitrary prime is provided. The total number of multiply operations and Arithmetic Logical Unit (ALU) operations to compute the product is minimized through the judicious use of polynomial evaluations at few points to decrease the number of multiplications while using only simple ALU operations.

    摘要翻译： 提供了一种有效的方法和装置，用于计算n为1的多项式的乘积，其中n为任意素数。 通过在几个点上明智地使用多项式评估来计算产品的乘法运算和算术逻辑单元（ALU）操作的总数最小化，以减少乘法器数量，同时仅使用简单的ALU操作。

    Speeding up Galois Counter Mode (GCM) computations
    6.
    发明授权
    Speeding up Galois Counter Mode (GCM) computations 有权
    加速伽罗瓦计数器模式（GCM）计算

    公开(公告)号：US07991152B2

    公开(公告)日：2011-08-02

    申请号：US11772150

    申请日：2007-06-30

    申请人： Shay Gueron ,  Michael E. Kounavis

    发明人： Shay Gueron ,  Michael E. Kounavis

    IPC分类号： H04K1/00

    CPC分类号： G06F7/724 ,  H04L9/0631 ,  H04L9/0643 ,  H04L9/3242 ,  H04L2209/043

    摘要： Methods and apparatus to speed up Galois Counter Mode (GCM) computations are described. In one embodiment, a carry-less multiplication instruction may be used to perform operations corresponding to verification of an encrypted message in accordance with GCM. Other embodiments are also described.

    摘要翻译： 描述加速伽罗瓦计数器模式（GCM）计算的方法和装置。 在一个实施例中，可以使用无进位乘法指令来执行与根据GCM的加密消息的验证相对应的操作。 还描述了其它实施例。

    METHOD AND APPARATUS FOR MULTIPLYING POLYNOMIALS WITH A PRIME NUMBER OF TERMS
    7.
    发明申请
    METHOD AND APPARATUS FOR MULTIPLYING POLYNOMIALS WITH A PRIME NUMBER OF TERMS 有权
    用多项主要方式多项式的方法和装置

    公开(公告)号：US20090157790A1

    公开(公告)日：2009-06-18

    申请号：US11957450

    申请日：2007-12-15

    申请人： Vinodh Gopal ,  Michael E. Kounavis

    发明人： Vinodh Gopal ,  Michael E. Kounavis

    IPC分类号： G06F7/523

    CPC分类号： G06F7/552 ,  G06F7/5324 ,  G06F7/724 ,  G06F2207/5523

    摘要： An efficient method and apparatus to compute a product of polynomials of degree n−1 where n is an arbitrary prime is provided. The total number of multiply operations and Arithmetic Logical Unit (ALU) operations to compute the product is minimized through the judicious use of polynomial evaluations at few points to decrease the number of multiplications while using only simple ALU operations.

    摘要翻译： 提供了一种有效的方法和装置，用于计算n为1的多项式的乘积，其中n为任意素数。 通过在几个点上明智地使用多项式评估来计算产品的乘法运算和算术逻辑单元（ALU）操作的总数最小化，以减少乘法器数量，同时仅使用简单的ALU操作。

    SURVEILLANCE-BASED RELAY ATTACK PREVENTION
    8.
    发明申请
    SURVEILLANCE-BASED RELAY ATTACK PREVENTION 审中-公开

    公开(公告)号：US20190044951A1

    公开(公告)日：2019-02-07

    申请号：US15926982

    申请日：2018-03-20

    申请人： Zoran Zivkovic ,  Michael E. Kounavis

    发明人： Zoran Zivkovic ,  Michael E. Kounavis

    IPC分类号： H04L29/06 ,  H04W12/08 ,  G06F21/60 ,  G07C9/00

    摘要： In one embodiment, an apparatus comprises an antenna to receive one or more radio signals, wherein the antenna is associated with a proximity-based access portal. The apparatus further comprises a processor to: detect, based on the one or more radio signals, an access request from a first device, wherein the access request comprises a request to access the proximity-based access portal using an access token associated with an authorized device; determine, based on the one or more radio signals, that the first device is within a particular proximity of the proximity-based access portal; obtain a first motion history associated with movement detected near the proximity-based access portal; obtain a second motion history associated with movement detected by the authorized device; and determine, based on the first motion history and the second motion history, whether the movement detected near the proximity-based access portal matches the movement detected by the authorized device.