Audio amplifier clipping avoidance method and apparatus
    2.
    发明授权
    Audio amplifier clipping avoidance method and apparatus 失效
    音频放大器限幅避免方法和装置

    公开(公告)号:US5672999A

    公开(公告)日:1997-09-30

    申请号:US586536

    申请日:1996-01-16

    IPC分类号: H03G3/30 H03G3/20

    CPC分类号: H03G3/3089

    摘要: An audio amplifier clipping avoidance apparatus (140) identifies signal segments of an audio signal that can have an amplitude peak greater than a particular amplifier clip avoidance threshold (530). A scaling factor is determined for each signal segment based on the particular threshold (540). Signal segments are scaled with corresponding scaling factors to produce a modified audio signal having no signal segments with an amplitude peak greater than the particular threshold (560).

    摘要翻译: 音频放大器限幅避免装置(140)识别可以具有大于特定放大器片段避免阈值的振幅峰值的音频信号的信号段(530)。 基于特定阈值为每个信号段确定缩放因子(540)。 用对应的缩放因子对信号段进行缩放,以产生没有具有大于特定阈值(560)的幅度峰值的信号段的修改音频信号。

    Two-way radio having a PLL
    3.
    发明授权
    Two-way radio having a PLL 失效
    具有PLL的双向无线电

    公开(公告)号:US4969210A

    公开(公告)日:1990-11-06

    申请号:US154550

    申请日:1988-02-10

    摘要: A method and arrangement for electronically bandswitching a radio (100) is described which includes at least a receiver (110, 111), a PLL (120), and a fully synchronized, programmable counter as a frequency divider (140) that is coupled between the receiver and the PLL. This fully synchronized divider (140) provides an output signal (143) at a lower frequency with minimal harmonic energy and improves the sideband noise performance as the divisor increases. When the radio also includes a transmitter (104), stepped attenuators (128, 132) are also included for adjusting the modulation of the PLL (120) when in the transmit mode.The PLL includes at least a reference signal generator (121, 122), a phase detector (124), and a voltage controlled oscillator (127) having an output (129) coupled, via a feedback path, to a second input (131) of the phase detector (124). The fully synchronized, programmable frequency divider includes at least a counter, a data loader, a half-period detector, and a synchronizer which are configured and arranged to provide an output signal (143) having a duty cycle, nearly equal to 50%, which is independent of a divisor and which simplifies the filtering requirements thereafter, thereby providing electronic bandswitching for the radio while exhibiting fast-locking and low-noise characteristics.

    摘要翻译: 描述了一种用于电子频带切换无线电(100)的方法和装置,其包括至少一个接收机(110,111),PLL(120)和作为分频器(140)的完全同步的可编程计数器, 接收器和PLL。 这个完全同步的分压器(140)以较低频率提供具有最小谐波能量的输出信号(143),并且随着除数增加而改善边带噪声性能。 当无线电还包括发射机(104)时,还包括步进衰减器(128,132),用于在发射模式时调节PLL(120)的调制。 PLL包括至少参考信号发生器(121,122),相位检测器(124)和压控振荡器(127),其具有经由反馈路径耦合到第二输入端(131)的输出(129) 相位检测器(124)。 完全同步的可编程分频器至少包括计数器,数据加载器,半周期检测器和同步器,其被配置和布置成提供具有几乎等于50%的占空比的输出信号(143) 其独立于除数,并且此后简化了滤波要求,从而为显示快速锁定和低噪声特性的无线电提供电子频段切换。

    Wide frequency range current-controlled oscillator
    4.
    发明授权
    Wide frequency range current-controlled oscillator 失效
    宽频率电流控制振荡器

    公开(公告)号:US4233575A

    公开(公告)日:1980-11-11

    申请号:US034303

    申请日:1979-04-30

    摘要: A wide frequency range current-controlled oscillator (CCO) provides a digital output signal that is frequency controllable by an input control current. The CCO includes a differential voltage comparator coupled to a timing capacitor for controlling charging and discharging currents applied to the timing capacitor. The charging and discharging currents are dependent on the input control current. The magnitude of the discharging current may be varied to control the duty cycle of the digital output signal.

    摘要翻译: 宽频率电流控制振荡器(CCO)提供可由输入控制电流进行频率控制的数字输出信号。 CCO包括耦合到定时电容器的差分电压比较器,用于控制施加到定时电容器的充电和放电电流。 充放电电流取决于输入控制电流。 可以改变放电电流的大小以控制数字输出信号的占空比。

    Conveyor construction
    5.
    发明授权
    Conveyor construction 失效
    输送机结构

    公开(公告)号:US5174435A

    公开(公告)日:1992-12-29

    申请号:US637536

    申请日:1991-01-04

    IPC分类号: B65G15/64 B65G21/06 B65G23/44

    CPC分类号: B65G23/44

    摘要: A conveyor construction including a frame having a pair of side rails with each side rail having a longitudinal T-shaped slot. A plurality of cross members are connected between the side rails and support a bed plate. An endless belt rides on the bed plate and is trained over an adjustable spindle assembly which is located at an end of the conveyor. The spindle assembly includes a spindle journalled between a pair of side members that are mounted for sliding movement in the T-slots of the respective side rails. A ratchet and pinion mechanism interconnects the conveyor frame with the spindle assembly and acts to move the spindle assembly longitudinally of the frame to tension the belt. A belt tracking mechanism is associated with each side of the spindle assembly and includes a cam member which is engaged with the respective side member of the spindle assembly. Individual rotation of the cam members serve to properly track the belt on the bed plate. To attach components to the conveyor frame, spring loaded nuts are slidably mounted in the T-slots of the side rails and the components are attached to the spring loaded nuts.

    Conveyor construction
    6.
    发明授权

    公开(公告)号:US06298981B1

    公开(公告)日:2001-10-09

    申请号:US09450368

    申请日:1999-11-29

    IPC分类号: B65G2344

    CPC分类号: B65G23/44

    摘要: A conveyor construction includes a frame, a drive section stationarily mounted to the frame, and a tensioning section mounted for longitudinal movement relative to the frame. The drive and tensioning sections each include a spindle, and a belt is engaged with the spindles. The frame defines an upper support surface disposed below the upper run of the belt, and mating engagement structure is provided on the belt and the upper support surface for preventing lateral movement of the belt relative to the upper support surface. The drive and tensioning sections include spaced side members, each of which defines an inwardly opening cavity for receiving a bearing assembly for rotatably supporting the spindle. The bearing-receiving cavity faces the spindle, and each side member defines outer wall structure which engages and supports the belt outwardly of the spindle. The belt overlies the outer wall structure of each side member and the adjacent belt-engaging portion of the spindle, so as to seal the inwardly facing opening and prevent ingress of moisture or other contaminants into the bearing-receiving cavity. A drive and locking arrangement for imparting movement to the tensioning section and for selectively locking the tensioning section in position includes a pair of pinion carriers or retainer blocks mounted one to each side of the frame, with a drive pinion being rotatably supported by the retainer blocks. Each side member includes integrally formed gear teeth engageable with opposite ends of the drive pinion, and a drive pinion actuator is engaged with one side of the frame for imparting rotation to the drive pinion to extend and retract the tensioning section. A locking arrangement is interconnected with the opposite end of the drive pinion, and functions to selectively frictionally engage the drive pinion with one of the retainer blocks to prevent rotation of the drive pinion and to thereby maintain the tensioning section in a desired position relative to the frame.

    Configuration single chip receiver integrated circuit architecture
    7.
    发明授权
    Configuration single chip receiver integrated circuit architecture 失效
    配置单芯片接收机集成电路架构

    公开(公告)号:US5953640A

    公开(公告)日:1999-09-14

    申请号:US847648

    申请日:1997-04-30

    IPC分类号: H04B1/40 H04B1/38

    CPC分类号: H04B1/403

    摘要: A single-chip transceiver integrated circuit (100) has multiple on-chip circuits that implement receiver functions, transmitter functions, and audio processing functions. The IC (100) has interfaces (220, 240, 252, 270, 260, 245, 288, 290) which are situated among the on-chip circuits, and which couple one on-chip circuit to another. At least some of these on-chip interfaces (220, 240, 245, 252, 270) are configurable to couple an off-chip processing circuit to substitute for a corresponding on-chip circuit. In the preferred embodiment, the single-chip transceiver IC (100) supports radio configurations having off-chip versions of corresponding on-chip circuits for performing receiver front-end functions, synthesizer functions, reference oscillator functions, and audio processing functions.

    摘要翻译: 单片收发器集成电路(100)具有多个片上电路,其实现接收机功能,发射机功能和音频处理功能。 IC(100)具有位于片上电路之间并且将一个片上电路耦合到另一片上的接口(220,240,252,270,260,245,288,290)。 这些片上接口(220,240,245,252,270)中的至少一些可配置为耦合片外处理电路以替代相应的片上电路。 在优选实施例中,单片收发器IC(100)支持具有用于执行接收机前端功能,合成器功能,参考振荡器功能和音频处理功能的相应片上电路的片外版本的无线电配置。

    Noise squelch circuit with adaptive noise shaping
    8.
    发明授权
    Noise squelch circuit with adaptive noise shaping 失效
    噪声静噪电路,具有自适应噪声整形

    公开(公告)号:US5303406A

    公开(公告)日:1994-04-12

    申请号:US692834

    申请日:1991-04-29

    IPC分类号: H03G3/34 H04B1/10 H04B1/16

    CPC分类号: H03G3/344 H04B1/1027

    摘要: A noise squelch circuit for a radio receiver (100) includes an adaptive filter (204) for shaping frequency characteristics of a demodulator out put (115) according to factors which effects squelch sensitivity. Such factors may include channel spacing of the receiver, received signal strength level, received signal deviation, and SINAD. The adaptive filter (204) comprises a switched capacitor filter, the response of which may be controlled by a control signal (212) according to one or more of such factors.

    摘要翻译: 用于无线电接收机(100)的噪声静噪电路包括用于根据影响静噪灵敏度的因素整形解调器输出(115)的频率特性的自适应滤波器(204)。 这些因素可以包括接收机的信道间隔,接收信号强度级别,接收信号偏差和SINAD。 自适应滤波器(204)包括开关电容滤波器,其响应可以由控制信号(212)根据这些因素中的一个或多个来控制。

    Multiplexed buffer
    9.
    发明授权
    Multiplexed buffer 失效
    多路复用缓冲区

    公开(公告)号:US4562405A

    公开(公告)日:1985-12-31

    申请号:US625347

    申请日:1984-06-27

    IPC分类号: H03F3/393 H03F3/00

    CPC分类号: H03F3/393

    摘要: A buffer is described which includes two gain stages which may be constructed of MOS devices, the first stage having a low noise characteristic and the second stage having a high current drive capability. The second stage is switched in circuit only when high current drive is needed so that the buffer otherwise exhibits the low noise characteristics of the first stage. A feedback network is also switched in circuit in a manner that maintains the buffer's loop gain substantially constant, whether or not the high current drive stage is in circuit.

    摘要翻译: 描述了一种缓冲器,其包括可由MOS器件构成的两个增益级,第一级具有低噪声特性,第二级具有高电流驱动能力。 仅当需要高电流驱动时,第二级才被切换,以使缓冲器表现出第一级的低噪声特性。 无论高电流驱动级是否在电路中,反馈网络也以使得缓冲器的环路增益基本上恒定的方式被切换到电路中。

    Low frequency astable oscillator having switchable current sources
    10.
    发明授权
    Low frequency astable oscillator having switchable current sources 失效
    具有可切换电流源的低频不稳定振荡​​器

    公开(公告)号:US4365213A

    公开(公告)日:1982-12-21

    申请号:US197386

    申请日:1980-10-16

    IPC分类号: H03K3/282 H03K3/283 H03B5/36

    CPC分类号: H03K3/2823 H03K3/283

    摘要: A low frequency oscillator of the astable type having good frequency stability, fast starting, good immunity to DC loading, and suitable for fabrication in integrated circuit form. First and second switching transistors of the astable multivibrator are cross-coupled by a coupling capacitor and a frequency determining crystal. Base drive to the respective switching transistors and charging current to the capacitor and crystal are provided by a pair of differential amplifiers which are referenced to a forward biased diode. The differential amplifiers are also connected to respective collector terminals of the switching transistors. The capacitor is of small value suitable for containment within an integrated circuit with the oscillator circuit. The differential amplifiers substantially increase the impedance levels in the oscillator and shift base drive to the switching transistors to minimize the effects of DC loading at the output terminals of the oscillator.

    摘要翻译: 低频振荡器具有良好的频率稳定性,启动速度快,对直流负载的良好抗扰性,适用于集成电路形式的制造。 不稳定多谐振荡器的第一和第二开关晶体管通过耦合电容器和频率确定晶体交叉耦合。 对各个开关晶体管的基极驱动和对电容器和晶体的充电电流由一对参考正向偏置二极管的差分放大器提供。 差分放大器也连接到开关晶体管的各个集电极端子。 该电容器具有小的值,适用于与振荡器电路集成电路内的容纳。 差分放大器基本上增加了振荡器中的阻抗电平,并将基极驱动转换到开关晶体管,以最小化振荡器输出端的直流负载的影响。