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公开(公告)号：US5953640A
公开(公告)日：1999-09-14
申请号：US847648
申请日：1997-04-30
CPC分类号： H04B1/403
摘要： A single-chip transceiver integrated circuit (100) has multiple on-chip circuits that implement receiver functions, transmitter functions, and audio processing functions. The IC (100) has interfaces (220, 240, 252, 270, 260, 245, 288, 290) which are situated among the on-chip circuits, and which couple one on-chip circuit to another. At least some of these on-chip interfaces (220, 240, 245, 252, 270) are configurable to couple an off-chip processing circuit to substitute for a corresponding on-chip circuit. In the preferred embodiment, the single-chip transceiver IC (100) supports radio configurations having off-chip versions of corresponding on-chip circuits for performing receiver front-end functions, synthesizer functions, reference oscillator functions, and audio processing functions.
摘要翻译： 单片收发器集成电路（100）具有多个片上电路，其实现接收机功能，发射机功能和音频处理功能。 IC（100）具有位于片上电路之间并且将一个片上电路耦合到另一片上的接口（220,240,252,270,260,245,288,290）。 这些片上接口（220,240,245,252,270）中的至少一些可配置为耦合片外处理电路以替代相应的片上电路。 在优选实施例中，单片收发器IC（100）支持具有用于执行接收机前端功能，合成器功能，参考振荡器功能和音频处理功能的相应片上电路的片外版本的无线电配置。
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公开(公告)号：US5894592A
公开(公告)日：1999-04-13
申请号：US839290
申请日：1997-04-17
CPC分类号： H03C3/0975 , H03C3/0941 , H03C3/0966 , H04B1/005 , H04B1/0057 , H04B1/0092 , H04B1/40
摘要： A wideband phase-lock loop frequency synthesizer (200) used in a radio transceiver capable of being reconfigured to operate in either a transmit, receive, or battery save mode. The wideband phase-lock loop frequency synthesizer (200) includes, a divide-by-two divider (205), quadrature detector (204), offset VCO (209) and offset mixer (207) for generating a quadrature phase modulated signal. Moreover, a programmable filter (211) is used for removing predetermined harmonic components of the offset mixed signal enabling the synthesizer to operate over a wide frequency range.
摘要翻译： 一种用于无线电收发机的宽带锁相环频率合成器（200），能够被重新配置为在发射，接收或电池节省模式下工作。 宽带锁相环频率合成器（200）包括用于产生正交相位调制信号的除以二分频器（205），正交检波器（204），偏移VCO（209）和偏移混频器（207）。 此外，可编程滤波器（211）用于去除偏移混合信号的预定谐波分量，使合成器能够在宽的频率范围内工作。
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公开(公告)号：US4562405A
公开(公告)日：1985-12-31
申请号：US625347
申请日：1984-06-27
CPC分类号： H03F3/393
摘要： A buffer is described which includes two gain stages which may be constructed of MOS devices, the first stage having a low noise characteristic and the second stage having a high current drive capability. The second stage is switched in circuit only when high current drive is needed so that the buffer otherwise exhibits the low noise characteristics of the first stage. A feedback network is also switched in circuit in a manner that maintains the buffer's loop gain substantially constant, whether or not the high current drive stage is in circuit.
摘要翻译： 描述了一种缓冲器，其包括可由MOS器件构成的两个增益级，第一级具有低噪声特性，第二级具有高电流驱动能力。 仅当需要高电流驱动时，第二级才被切换，以使缓冲器表现出第一级的低噪声特性。 无论高电流驱动级是否在电路中，反馈网络也以使得缓冲器的环路增益基本上恒定的方式被切换到电路中。
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公开(公告)号：US07355456B2
公开(公告)日：2008-04-08
申请号：US11199493
申请日：2005-08-08
IPC分类号： G01R19/00
CPC分类号： G01R19/04
摘要： A wide linear range peak detector including first and second peak detectors and a compensation circuit. The first peak detector receives an input signal and has an output providing a first peak signal approximation which approximates a peak level of the input signal. The first peak signal approximation includes a non-linear portion which is a function of the peak level of the input signal. The second peak detector also receives the input signal and has an output providing a second peak signal approximation. The compensation circuit uses the second peak signal approximation to provide a compensation signal which compensates the non-linear portion of the first peak signal approximation. In particular, the second peak signal is used to generate the compensation signal to approximate and cancel the non-linear portion.
摘要翻译： 宽线性范围峰值检测器，包括第一和第二峰值检测器和补偿电路。 第一峰值检测器接收输入信号并具有提供近似输入信号的峰值电平的第一峰值信号近似的输出。 第一峰值信号近似包括作为输入信号的峰值电平的函数的非线性部分。 第二峰值检测器还接收输入信号并具有提供第二峰值信号近似的输出。 补偿电路使用第二峰值信号近似来提供补偿第一峰值信号近似的非线性部分的补偿信号。 特别地，第二峰值信号用于产生补偿信号以近似和消除非线性部分。
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公开(公告)号：US08004367B2
公开(公告)日：2011-08-23
申请号：US12428215
申请日：2009-04-22
IPC分类号： H03B5/12
摘要： A PLL receives an indicator indicating that it is to operate at a different operating frequency than a current operating frequency. A control word is selected from a set of linear control words based upon the different operating frequency. A capacitance of a variable capacitor of a voltage-controlled oscillator is adjusted based upon the control word. The variable capacitor is monotonic and non-linear relative to the set of linear control words.
摘要翻译： 一个PLL接收一个指示器，指示它在与当前工作频率不同的工作频率下工作。 基于不同的操作频率从一组线性控制字中选择控制字。 基于控制字调整压控振荡器的可变电容器的电容。 可变电容器相对于线性控制字的集合是单调的和非线性的。
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公开(公告)号：US20100271137A1
公开(公告)日：2010-10-28
申请号：US12428215
申请日：2009-04-22
IPC分类号： H03L7/00
摘要： A PLL receives an indicator indicating that it is to operate at a different operating frequency than a current operating frequency. A control word is selected from a set of linear control words based upon the different operating frequency. A capacitance of a variable capacitor of a voltage-controlled oscillator is adjusted based upon the control word. The variable capacitor is monotonic and non-linear relative to the set of linear control words.
摘要翻译： 一个PLL接收一个指示器，指示它在与当前工作频率不同的工作频率下工作。 基于不同的操作频率从一组线性控制字中选择控制字。 基于控制字调整压控振荡器的可变电容器的电容。 可变电容器相对于线性控制字的集合是单调的和非线性的。
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公开(公告)号：US07411467B2
公开(公告)日：2008-08-12
申请号：US11467791
申请日：2006-08-28
IPC分类号： H03B5/32
CPC分类号： H03B5/36 , H03B2200/007
摘要： An overtone crystal oscillator automatic calibration system including an overtone crystal oscillator with multiple programmable resistors and multiple amplifiers with supply voltage inputs and a calibration system. The calibration system adjusts the programmable resistors and the supply voltage inputs and detects oscillation of the overtone crystal oscillator. The calibration system adjusts the programmable resistors and the supply voltage input for each of multiple sequential steps to adjust the frequency bandwidth, such as from a higher bandwidth and lower gain to a lower bandwidth at higher gain. For example, each resistance level is tested for each of multiple supply voltage levels. The range of resistances and voltages is designed to ensure oscillation at a selected overtone frequency while avoiding oscillation at a fundamental frequency of the oscillator crystal. Oscillation may be detected by a counter which counts to a predetermined count value indicating successful oscillation.
摘要翻译： 一个泛音晶体振荡器自动校准系统，包括具有多个可编程电阻的泛音晶体振荡器和具有电源电压输入的多个放大器和校准系统。 校准系统调节可编程电阻和电源电压输入，并检测泛音晶体振荡器的振荡。 校准系统为多个顺序步骤中的每一个调整可编程电阻和电源电压输入，以便在较高增益下调整频带宽度，例如从较高带宽和较低增益到较低带宽。 例如，对于多个电源电压电平中的每一个测试每个电阻电平。 电阻和电压的范围被设计为确保在所选择的泛音频率下的振荡，同时避免在振荡器晶体的基频处的振荡。 振荡可以由计数器计数到预定计数值，表示成功振荡。
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公开(公告)号：US20080068106A1
公开(公告)日：2008-03-20
申请号：US11467791
申请日：2006-08-28
IPC分类号： H03B5/32
CPC分类号： H03B5/36 , H03B2200/007
摘要： An overtone crystal oscillator automatic calibration system including an overtone crystal oscillator with multiple programmable resistors and multiple amplifiers with supply voltage inputs and a calibration system. The calibration system adjusts the programmable resistors and the supply voltage inputs and detects oscillation of the overtone crystal oscillator. The calibration system adjusts the programmable resistors and the supply voltage input for each of multiple sequential steps to adjust the frequency bandwidth, such as from a higher bandwidth and lower gain to a lower bandwidth at higher gain. For example, each resistance level is tested for each of multiple supply voltage levels. The range of resistances and voltages is designed to ensure oscillation at a selected overtone frequency while avoiding oscillation at a fundamental frequency of the oscillator crystal. Oscillation may be detected by a counter which counts to a predetermined count value indicating successful oscillation.
摘要翻译： 一个泛音晶体振荡器自动校准系统，包括具有多个可编程电阻的泛音晶体振荡器和具有电源电压输入的多个放大器和校准系统。 校准系统调节可编程电阻和电源电压输入，并检测泛音晶体振荡器的振荡。 校准系统为多个顺序步骤中的每一个调整可编程电阻和电源电压输入，以便在较高增益下调整频带宽度，例如从较高带宽和较低增益到较低带宽。 例如，对于多个电源电压电平中的每一个测试每个电阻电平。 电阻和电压的范围被设计为确保在所选择的泛音频率下的振荡，同时避免在振荡器晶体的基频处的振荡。 振荡可以由计数器计数到预定计数值，表示成功振荡。
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