ERROR-CORRECTION DECODING WITH REDUCED MEMORY AND POWER REQUIREMENTS
    1.
    发明申请
    ERROR-CORRECTION DECODING WITH REDUCED MEMORY AND POWER REQUIREMENTS 有权
    具有减少内存和电源要求的错误修正解码

    公开(公告)号:US20140164865A1

    公开(公告)日:2014-06-12

    申请号:US14236166

    申请日:2011-07-31

    IPC分类号: H03M13/11

    摘要: An example method is provided that includes receiving a representation of a codeword that includes a plurality of bits, and associating the bits with a respective plurality of one-bit hard-bit values representing the bits and multiple-bit soft-bit values representing measures of reliability of respective hard-bit values. The method includes for each of a plurality of iterations, updating a hard-bit/soft-bit value of one or more bits of a respective subset of the bits as a function of current hard-bit values of the subset's bits, and the current hard-bit and soft-bit values of the respective bit. For two iterations in which the current hard-bit and soft-bit values for each bit of a subset for both iterations is the same, the hard-bit/soft-bit value updated for any bit of the subset during one of the two iterations is the same as that computed for the respective bit during the other of the two iterations.

    摘要翻译: 提供了一种示例性方法,其包括接收包括多个比特的码字的表示,并且将比特与表示比特的相应多个一比特硬比特值和表示多个比特的度量的多比特软比特值相关联 各个硬比特值的可靠性。 该方法包括多个迭代中的每一个,作为该子集的比特的当前硬比特值的函数来更新比特的相应子集的一个或多个比特的硬比特/软比特值,以及当前 相应位的硬比特和软比特值。 对于两次迭代,其中对于两次迭代的子集的每个位的当前硬比特和软比特值是相同的,则在两次迭代之一期间为子集的任何比特更新的硬比特/软比特值 与在两次迭代中的另一个中相应位计算的相同。

    Fast detection of convergence or divergence in iterative decoding
    2.
    发明授权
    Fast detection of convergence or divergence in iterative decoding 失效
    快速检测迭代解码中的收敛或发散

    公开(公告)号:US08645810B2

    公开(公告)日:2014-02-04

    申请号:US13194952

    申请日:2011-07-31

    IPC分类号: H03M13/03

    CPC分类号: H03M13/1128

    摘要: A termination indication is computed during an iteration of an iterative decoding of a representation of a codeword according to a schedule. The termination indication is tested to see if the decoding has converged or is not likely to converge. The testing of the termination indication shows convergence or lack of likelihood thereof even if a codeword bit estimate was flipped during an immediately preceding traversal of the schedule. Preferably, the termination indication includes an error correction syndrome weight, a zero value whereof indicates convergence, and the computing of the termination indication includes, in response to the flipping of a codeword bit estimate, flipping the error correction syndrome bits that are influenced by that codeword bit estimate.

    摘要翻译: 在根据时间表对码字的表示的迭代解码的迭代期间计算终止指示。 测试终止指示以查看解码是否收敛或不可能收敛。 终止指示的测试显示出收敛或缺乏可能性,即使在紧接着的日程表遍历期间翻转了码字比特估计。 优选地,终止指示包括纠错综合征权重,其值指示收敛的零值,并且终止指示的计算响应于码字比特估计的翻转而包括翻转受该比特估计影响的纠错综合征比特 码字比特估计。

    Error-correction decoding with reduced memory and power requirements
    3.
    发明授权
    Error-correction decoding with reduced memory and power requirements 有权
    纠错解码,减少内存和电源需求

    公开(公告)号:US09270297B2

    公开(公告)日:2016-02-23

    申请号:US14236166

    申请日:2011-07-31

    摘要: An example method is provided that includes receiving a representation of a codeword that includes a plurality of bits, and associating the bits with a respective plurality of one-bit hard-bit values representing the bits and multiple-bit soft-bit values representing measures of reliability of respective hard-bit values. The method includes for each of a plurality of iterations, updating a hard-bit/soft-bit value of one or more bits of a respective subset of the bits as a function of current hard-bit values of the subset's bits, and the current hard-bit and soft-bit values of the respective bit. For two iterations in which the current hard-bit and soft-bit values for each bit of a subset for both iterations is the same, the hard-bit/soft-bit value updated for any bit of the subset during one of the two iterations is the same as that computed for the respective bit during the other of the two iterations.

    摘要翻译: 提供了一种示例性方法,其包括接收包括多个比特的码字的表示,并且将比特与表示比特的相应多个一比特硬比特值和表示多个比特的度量的多比特软比特值相关联 各个硬比特值的可靠性。 该方法包括多个迭代中的每一个,作为该子集的比特的当前硬比特值的函数来更新比特的相应子集的一个或多个比特的硬比特/软比特值,以及当前 相应位的硬比特和软比特值。 对于两次迭代,其中对于两次迭代的子集的每个位的当前硬比特和软比特值是相同的,则在两次迭代之一期间为子集的任何比特更新的硬比特/软比特值 与在两次迭代中的另一个中相应位计算的相同。

    Systems and methods of storing data
    4.
    发明授权
    Systems and methods of storing data 有权
    存储数据的系统和方法

    公开(公告)号:US09032269B2

    公开(公告)日:2015-05-12

    申请号:US13329819

    申请日:2011-12-19

    摘要: A method of writing data includes receiving data pages to be stored in a data storage device and generating codewords corresponding to the received data pages. The codewords are stored to physical pages of a first memory portion of the data storage device. A first portion of a particular codeword that corresponds to a particular data page is stored at a first physical page of the first memory portion. A second portion of the particular codeword is stored at a second physical page of the first memory portion. The codewords are copied from the physical pages of the first memory portion to a physical page of a second memory portion of the data storage device.

    摘要翻译: 一种写入数据的方法包括接收要存储在数据存储装置中的数据页,并产生与接收的数据页对应的码字。 码字被存储到数据存储设备的第一存储器部分的物理页面。 对应于特定数据页的特定码字的第一部分存储在第一存储器部分的第一物理页面。 特定码字的第二部分被存储在第一存储器部分的第二物理页面上。 将码字从第一存储器部分的物理页面复制到数据存储设备的第二存储器部分的物理页面。

    Method and device for multi phase error-correction
    5.
    发明授权
    Method and device for multi phase error-correction 有权
    多相纠错方法和装置

    公开(公告)号:US08832518B2

    公开(公告)日:2014-09-09

    申请号:US12034718

    申请日:2008-02-21

    IPC分类号: H03M13/00

    摘要: Data bits to be encoded are split into a plurality of subgroups. Each subgroup is encoded separately to generate a corresponding codeword. Selected subsets are removed from the corresponding codewords, leaving behind shortened codewords, and are many-to-one transformed to condensed bits. The final codeword is a combination of the shortened codewords and the condensed bits. A representation of the final codeword is decoded by being partitioned to a selected subset and a plurality of remaining subsets. Each remaining subset is decoded separately. A subset whose decoding is terminated is decoded again, at least in part according to the selected subset. If the encoding and decoding are systematic then the selected subsets are of parity bits.

    摘要翻译: 要编码的数据位被分割成多个子组。 每个子组被分别编码以产生相应的码字。 所选择的子集从相应的码字中移除,留下缩短的码字,并且被多对一地转换成浓缩比特。 最终码字是缩短的码字和浓缩比特的组合。 最终码字的表示被分割成选定的子集和多个剩余子集。 每个剩余子集被单独解码。 解码终止的子集至少部分地根据所选择的子集被再次解码。 如果编码和解码是系统的,则所选择的子集是奇偶校验位。

    Probabilistic error correction in multi-bit-per-cell flash memory
    6.
    发明授权
    Probabilistic error correction in multi-bit-per-cell flash memory 失效
    多比特单元闪存中的概率误差校正

    公开(公告)号:US08650462B2

    公开(公告)日:2014-02-11

    申请号:US12401634

    申请日:2009-03-11

    IPC分类号: G11C29/00 H03M13/00

    摘要: Data that are stored in cells of a multi-bit-per cell memory, according to a systematic or non-systematic ECC, are read and corrected (systematic ECC) or recovered (non-systematic ECC) in accordance with estimated probabilities that one or more of the read bits are erroneous. In one method of the present invention, the estimates are a priori. In another method of the present invention, the estimates are based only on aspects of the read bits that include significances or bit pages of the read bits. In a third method of the present invention, the estimates are based only on values of the read bits. Not all the estimates are equal.

    摘要翻译: 根据系统或非系统ECC存储在多比特单元存储器的单元中的数据根据​​估计的概率被读取和校正(系统ECC)或恢复(非系统ECC) 更多的读取位是错误的。 在本发明的一种方法中,估计是先验的。 在本发明的另一种方法中,估计仅基于包括读位的重要性或位页的读位的方面。 在本发明的第三种方法中,估计仅基于读位的值。 并不是所有的估计是相等的。

    Multi-phase ECC encoding using algebraic codes
    7.
    发明授权
    Multi-phase ECC encoding using algebraic codes 有权
    使用代数代码的多阶段ECC编码

    公开(公告)号:US08645789B2

    公开(公告)日:2014-02-04

    申请号:US13335534

    申请日:2011-12-22

    IPC分类号: H03M13/00

    CPC分类号: G06F11/1012

    摘要: A method includes a first encoding operation associated with a first algebraic error correcting code generating a first set of first parity bits corresponding to a first set of information bits and a second set of first parity bits corresponding to a second set of information bits. A second encoding operation associated with a second algebraic error correcting code generates a first set of second parity bits corresponding to the first set of information bits and a second set of second parity bits corresponding to the second set of information bits. A third encoding operation generates a set of joint parity bits. The first set of information bits, the second set of information bits, the first set of first parity bits, the second set of first parity bits, and the joint parity bits may be stored in a data storage device as a single codeword.

    摘要翻译: 一种方法包括与第一代数纠错码相关联的第一编码操作,所述第一代数纠错码产生对应于第一组信息比特的第一奇偶校验位的第一组,以及与第二组信息比特对应的第二奇偶校验位组。 与第二代数纠错码相关联的第二编码操作产生对应于第一组信息比特的第一组第二奇偶校验位和对应于第二组信息比特的第二奇偶校验位组。 第三编码操作产生一组联合奇偶校验位。 第一组信息位,第二组信息位,第一组第一奇偶校验位,第二组第一奇偶校验位和联合奇偶校验位可以作为单个码字存储在数据存储设备中。

    Reduced complexity LDPC decoder
    8.
    发明授权
    Reduced complexity LDPC decoder 有权
    降低复杂度的LDPC解码器

    公开(公告)号:US08429512B2

    公开(公告)日:2013-04-23

    申请号:US12404308

    申请日:2009-03-15

    IPC分类号: G06F11/00

    摘要: To decode a manifestation of a codeword in which K information bits are encoded as N>K codeword bits, messages are exchanged between N bit nodes and N−K check nodes. During computation, messages are expressed with a full message length greater than two bits. In each iteration, representations of at least some of the exchanged messages are stored. For at least one node, if representations of messages sent from that node are stored, then the representation of one or more of the messages is stored using at least two bits but using fewer bits than the full message length, and the representation of one other message is stored with full message length. Preferably, the messages that are stored using fewer bits than the full message length are messages sent from check nodes.

    摘要翻译: 为了解码其中K个信息比特被编码为N> K个码字比特的码字的表现,在N个比特节点和N-K个校验节点之间交换消息。 在计算期间,消息以大于两位的完整消息长度表示。 在每次迭代中,存储至少一些交换的消息的表示。 对于至少一个节点,如果存储从该节点发送的消息的表示,则使用至少两个比特来存储一个或多个消息的表示,但是使用比全消息长度更少的比特,并且另一个的表示 消息以完整的消息长度存储。 优选地,使用比完整消息长度少的位来存储的消息是从校验节点发送的消息。

    Error correction decoding by trial and error
    9.
    发明授权
    Error correction decoding by trial and error 有权
    纠错解码通过反复试验

    公开(公告)号:US08042029B2

    公开(公告)日:2011-10-18

    申请号:US11528556

    申请日:2006-09-28

    IPC分类号: H03M13/03

    摘要: A representation of a codeword is decoded by applying a first decoder of the codeword to the representation of the codeword. If applying the first decoder fails to decode the representation of the codeword then a second decoder of the codeword is applied to the representation of the codeword. Preferably, applying the first decoder consumes less power and is faster than applying the second decoder. Data are ported by encoding the data as a codeword, exporting the codeword to a corrupting medium, importing a representation of the codeword, and applying a first decoder to the representation of the codeword. If applying the first decoder fails to decode the representation of the codeword then a second decoder of the codeword is applied to the representation of the codeword.

    摘要翻译: 通过将码字的第一解码器应用于码字的表示来解码码字的表示。 如果应用第一解码器不能解码码字的表示,则码字的第二解码器被应用于码字的表示。 优选地,应用第一解码器消耗较少的功率并且比应用第二解码器更快。 数据通过将数据编码为码字来移植,将码字导出到破坏性介质,导入码字的表示,以及将第一解码器应用于码字的表示。 如果应用第一解码器不能解码码字的表示,则码字的第二解码器被应用于码字的表示。

    Adaptive dynamic reading of flash memories
    10.
    发明授权
    Adaptive dynamic reading of flash memories 有权
    闪存的自适应动态读取

    公开(公告)号:US07903468B2

    公开(公告)日:2011-03-08

    申请号:US11941945

    申请日:2007-11-18

    IPC分类号: G11C16/04

    摘要: Each of a plurality of flash memory cells is programmed to a respective one of L≧2 threshold voltage states within a threshold voltage window. Values of parameters of threshold voltage functions are adjusted in accordance with comparisons of the threshold voltages of some or all of the cells to two or more of m≧2 threshold voltage intervals within the threshold voltage window. Reference voltages for reading the cells are selected based on the values. Alternatively, the m threshold voltage intervals span the threshold voltage window, and respective threshold voltage states are assigned to the cells based on numbers of cells whose threshold voltages are in the intervals, without re-reading the cells.

    摘要翻译: 多个闪存单元中的每一个被编程为阈值电压窗口内的L≥2个阈值电压状态中的相应一个。 根据阈值电压窗口内的一些或所有单元的阈值电压与两个或多个m≥2个阈值电压间隔的比较,来调整阈值电压函数的参数值。 基于这些值来选择用于读取单元的参考电压。 或者,m阈值电压间隔跨越阈值电压窗口,并且基于阈值电压处于间隔中的单元的数量而将各个阈值电压状态分配给单元,而不重新读取单元。