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    Programming at Least One Multi-Level Phase Change Memory Cell
    1.
    发明申请
    Programming at Least One Multi-Level Phase Change Memory Cell 审中-公开
    至少编写一个多级相变存储单元

    公开(公告)号：US20110242884A1

    公开(公告)日：2011-10-06

    申请号：US13069512

    申请日：2011-06-06

    申请人： Evangelos S. Eleftheriou ,  Angeliki Pantazi ,  Nikolaos Papandreou ,  Charalampos Pozidis ,  Abu Sebastian

    发明人： Evangelos S. Eleftheriou ,  Angeliki Pantazi ,  Nikolaos Papandreou ,  Charalampos Pozidis ,  Abu Sebastian

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0069 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0064 ,  G11C2013/0057 ,  G11C2013/0076 ,  G11C2013/0085

    摘要： A method of applying at least one programming pulse to the a PCM cell for programming the PCM cell to have a respective definite cell state, the definite cell state being defined by a definite resistance level using an annealing pulse or a melting pulse. The respective definite cell state represents two information entities, a step of applying a first reading pulse to the respective programmed PCM cell to provide a first resistance value, a step of applying at least a second reading pulse to the respective programmed PCM cell to provide a second resistance value, the first reading pulse and the second reading pulse being different pulses; and a step of determining the respective definite cell state of the respective programmed PCM cell dependent on the respective provided first resistance value and the respective provided second resistance value.

    摘要翻译： 一种向PCM单元施加至少一个编程脉冲以将PCM单元编程为具有相应的确定单元状态的方法，该定单元状态由使用退火脉冲或熔化脉冲的确定电阻水平定义。 相应的确定单元状态表示两个信息实体，将第一读取脉冲施加到相应编程的PCM单元以提供第一电阻值的步骤;将至少第二读取脉冲施加到相应编程的PCM单元以提供 第二电阻值，第一读取脉冲和第二读取脉冲是不同的脉冲; 以及取决于相应提供的第一电阻值和相应提供的第二电阻值来确定相应编程PCM单元的相应确定单元状态的步骤。

    MULTILEVEL PROGRAMMING OF PHASE CHANGE MEMORY
    2.
    发明申请
    MULTILEVEL PROGRAMMING OF PHASE CHANGE MEMORY 有权
    相位变化记忆的多重编程

    公开(公告)号：US20110051508A1

    公开(公告)日：2011-03-03

    申请号：US12861947

    申请日：2010-08-24

    申请人： Evangelos S. Eleftheriou ,  Angeliki Pantazi ,  Nikolaos Papandreou ,  Charalampos Pozidis ,  Abu Sebastian

    发明人： Evangelos S. Eleftheriou ,  Angeliki Pantazi ,  Nikolaos Papandreou ,  Charalampos Pozidis ,  Abu Sebastian

    IPC分类号： G11C11/00

    CPC分类号： G11C13/02 ,  G11C11/21 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0071 ,  G11C2013/0092 ,  G11C2213/79

    摘要： A method and device for performing a program operation of a phase change memory (PCM) cell. The method includes the steps of applying one or more programming pulses according to a predefined programming scheme to achieve a target resistance level of the PCM cell, wherein the programming scheme is operable to perform in a first programming mode one or more annealing steps to approach the target resistance, wherein the programming scheme is operable to perform in a second programming mode one or more melting steps, wherein the programming scheme is operable to start in the first programming mode and to switch to the second programming mode if the target resistance level of the PCM cell has been undershot in the first programming mode.

    摘要翻译： 一种用于执行相变存储器（PCM）单元的编程操作的方法和装置。 该方法包括以下步骤：根据预定义的编程方案应用一个或多个编程脉冲以实现PCM单元的目标电阻电平，其中编程方案可操作以在第一编程模式下执行一个或多个退火步骤以接近 目标电阻，其中所述编程方案可操作以在第二编程模式下执行一个或多个熔化步骤，其中所述编程方案可操作以在所述第一编程模式下启动并且如果所述编程方案的目标电阻水平 PCM单元在第一个编程模式下已经不足。

    PROGRAMMING AT LEAST ONE MULTI-LEVEL PHASE CHANGE MEMORY CELL
    6.
    发明申请
    PROGRAMMING AT LEAST ONE MULTI-LEVEL PHASE CHANGE MEMORY CELL 有权
    编程至少一个多级相变记忆细胞

    公开(公告)号：US20130021845A1

    公开(公告)日：2013-01-24

    申请号：US13638311

    申请日：2011-03-23

    申请人： Evangelos S. Eleftheriou ,  Angeliki Pantazi ,  Nikolaos Papandreou ,  Haris Pozidis ,  Abu Sebastian

    发明人： Evangelos S. Eleftheriou ,  Angeliki Pantazi ,  Nikolaos Papandreou ,  Haris Pozidis ,  Abu Sebastian

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0069 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0097 ,  G11C2013/0078

    摘要： A method is provided that comprises a step of programming the PCM cell to have a respective definite cell state by at least one current pulse flowing to the PCM cell, said respective definite cell state being defined at least by a respective definite resistance level, a step of controlling said respective current pulse by a respective bitline pulse and a respective wordline pulse, and a step of controlling said respective bitline pulse and said respective wordline pulse dependent on an actual resistance value of the PCM cell and a respective reference resistance value being defined for the definite resistance level.

    摘要翻译： 提供了一种方法，其包括通过流向PCM单元的至少一个电流脉冲对PCM单元进行编程以具有相应的确定单元状态的步骤，所述相应的确定单元状态至少由相应的确定电阻水平限定，步骤 通过相应的位线脉冲和相应的字线脉冲来控制所述各个电流脉冲，以及根据PCM单元的实际电阻值来控制所述各个位线脉冲和所述各个字线脉冲的步骤，以及相应的参考电阻值被定义为 确定阻力位。

    Programming at least one multi-level phase change memory cell
    7.
    发明授权
    Programming at least one multi-level phase change memory cell 有权
    编程至少一个多级相变存储单元

    公开(公告)号：US09064571B2

    公开(公告)日：2015-06-23

    申请号：US13638311

    申请日：2011-03-23

    申请人： Evangelos S. Eleftheriou ,  Angeliki Pantazi ,  Nikolaos Papandreou ,  Haris Pozidis ,  Abu Sebastian

    发明人： Evangelos S. Eleftheriou ,  Angeliki Pantazi ,  Nikolaos Papandreou ,  Haris Pozidis ,  Abu Sebastian

    IPC分类号： G11C11/00 ,  G11C13/00 ,  G11C11/56

    CPC分类号： G11C13/0069 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0097 ,  G11C2013/0078

    摘要： A method is provided that comprises a step of programming the PCM cell to have a respective definite cell state by at least one current pulse flowing to the PCM cell, said respective definite cell state being defined at least by a respective definite resistance level, a step of controlling said respective current pulse by a respective bitline pulse and a respective wordline pulse, and a step of controlling said respective bitline pulse and said respective wordline pulse dependent on an actual resistance value of the PCM cell and a respective reference resistance value being defined for the definite resistance level.

    摘要翻译： 提供了一种方法，其包括通过流向PCM单元的至少一个电流脉冲对PCM单元进行编程以具有相应的确定单元状态的步骤，所述相应的确定单元状态至少由相应的确定电阻水平限定，步骤 通过相应的位线脉冲和相应的字线脉冲来控制所述各个电流脉冲，以及根据PCM单元的实际电阻值来控制所述各个位线脉冲和所述各个字线脉冲的步骤，以及相应的参考电阻值被定义为 确定阻力位。

    CELL-STATE MEASUREMENT IN RESISTIVE MEMORY
    8.
    发明申请
    CELL-STATE MEASUREMENT IN RESISTIVE MEMORY 审中-公开
    电阻记忆体中的细胞状态测量

    公开(公告)号：US20120230081A1

    公开(公告)日：2012-09-13

    申请号：US13415127

    申请日：2012-03-08

    申请人： Gael Close ,  Christoph Hagleitner ,  Angeliki Pantazi ,  Nikolaos Papandreou ,  Charalampos Pozidis ,  Abu Sebastian

    发明人： Gael Close ,  Christoph Hagleitner ,  Angeliki Pantazi ,  Nikolaos Papandreou ,  Charalampos Pozidis ,  Abu Sebastian

    IPC分类号： G11C11/00

    CPC分类号： G11C5/147 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/004 ,  G11C13/0061 ,  G11C2211/5645

    摘要： Apparatus and method for measuring the state of a resistive memory cell. A bias voltage controller applies a bias voltage to the cell and controls the level of the bias voltage. A feedback signal generator senses cell current due to the bias voltage and generates a feedback signal (SFB) dependent on the difference between the cell current and a predetermined target current. The bias voltage controller controls the bias voltage level in dependence on the feedback signal (SFB) such that the cell current converges on the target current. An output is provided indicative of the bias voltage level at which the cell current corresponds to the target current, thus providing a voltage-based metric for cell-state.

    摘要翻译： 用于测量电阻式存储单元的状态的装置和方法。 偏置电压控制器向电池施加偏置电压并控制偏置电压的电平。 反馈信号发生器由于偏置电压而感测电池电流，并且根据电池电流和预定目标电流之间的差产生反馈信号（SFB）。 偏置电压控制器根据反馈信号（SFB）控制偏置电压电平，使得电池电流收敛于目标电流。 提供指示电池电流对应于目标电流的偏置电压电平的输出，从而为电池状态提供基于电压的度量。