公开(公告)号：US20180315721A1

公开(公告)日：2018-11-01

申请号：US15945778

申请日：2018-04-05

Applicant: FUJITSU LIMITED

Inventor： Masaru Sato ,  Yukiyasu Furukawa

IPC: H01L23/66 ,  H01L23/049 ,  H01L23/492 ,  H01L23/498 ,  H01L21/48 ,  H01L25/065 ,  H01L25/00 ,  H01Q1/22 ,  H01Q1/48

CPC classification number: H01L23/66 ,  H01L21/4817 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/4875 ,  H01L23/04 ,  H01L23/041 ,  H01L23/043 ,  H01L23/049 ,  H01L23/055 ,  H01L23/492 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L25/0657 ,  H01L25/50 ,  H01L2223/6611 ,  H01L2223/6616 ,  H01L2223/6677 ,  H01L2223/6683 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/0651 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2924/15192 ,  H01L2924/16195 ,  H01Q1/2283 ,  H01Q1/48 ,  H01L2924/00014

Abstract: A radio frequency circuit includes, a multilayer substrate having a grounded base metal and a plurality of insulating layers and wiring layers formed over the grounded base metal and having a recess surrounded by the plurality of insulating layers and wiring layers over the grounded base metal, an upper substrate having a through-hole penetrating the upper substrate, a first semiconductor chip mounted on the upper surface of the upper substrate and electrically coupled to a metal film formed on the lower surface of the upper substrate, a metal pillar formed on the upper surface of the grounded base metal in the recess, and a solder buried in the through-hole and bonded to the metal film and the upper surface of the metal pillar. The metal film is bonded to a ground wiring layer electrically coupled to the grounded base metal among the plurality of wiring layers.

公开(公告)号：US10403587B2

公开(公告)日：2019-09-03

申请号：US15945778

申请日：2018-04-05

Applicant: FUJITSU LIMITED

Inventor： Masaru Sato ,  Yukiyasu Furukawa

IPC: H01L23/66 ,  H01L23/492 ,  H01L23/498 ,  H01L21/48 ,  H01L25/065 ,  H01L25/00 ,  H01Q1/22 ,  H01Q1/48 ,  H01L23/049

Abstract: A radio frequency circuit includes, a multilayer substrate having a grounded base metal and a plurality of insulating layers and wiring layers formed over the grounded base metal and having a recess surrounded by the plurality of insulating layers and wiring layers over the grounded base metal, an upper substrate having a through-hole penetrating the upper substrate, a first semiconductor chip mounted on the upper surface of the upper substrate and electrically coupled to a metal film formed on the lower surface of the upper substrate, a metal pillar formed on the upper surface of the grounded base metal in the recess, and a solder buried in the through-hole and bonded to the metal film and the upper surface of the metal pillar. The metal film is bonded to a ground wiring layer electrically coupled to the grounded base metal among the plurality of wiring layers.