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    Sigma-Delta Analog-Digital Converter For An Xdsl Multistandard Input Stage
    7.
    发明申请
    Sigma-Delta Analog-Digital Converter For An Xdsl Multistandard Input Stage 失效
    用于Xdsl多标准输入级的Sigma-Delta模拟数字转换器

    公开(公告)号：US20080297385A1

    公开(公告)日：2008-12-04

    申请号：US11661627

    申请日：2004-09-02

    申请人： Martin Clara ,  Antonio Di Giandomenico ,  Joerg Hauptmann ,  Andreas Wiesbauer

    发明人： Martin Clara ,  Antonio Di Giandomenico ,  Joerg Hauptmann ,  Andreas Wiesbauer

    IPC分类号： H03M3/04

    CPC分类号： H03M3/394 ,  H03M3/406 ,  H03M3/424 ,  H03M3/452

    摘要： The invention relates to a sigma-delta analogue/digital converter for an xDSL multi-standard input stage for converting an xDSL signal into a digital output signal, where the sigma-delta analogue/digital converter (1) has: an analogue loop filter (6) which filters an analogue difference signal between the xDSL signal to be converted and a feedback signal in order to produce a filter output signal; a quantizer which quantizes the filter output signal from the analogue loop filter (6) in order to produce the digital output signal; a first digital/analogue converter (16) which converts the digital output signal into the analogue feedback signal; where the analogue loop filter (6) has at least two resonator filter stages (6a, 6b) which respectively comprise a first integrator (6a-1; 6b-1) and a second integrator (6a-2; 6b-2) connected in series therewith, where the second integrator (6a-2; 6b-2) can be connected to the first integrator (6a-1, 6b-1) by means of a controllable feedback switch (6a-3, 6b-3) in order to close a local feedback loop, where the integrator outputs can respectively be connected by means of a controllable switch (25) to a signal input of an adder (27) which adds the output signals from the integrators in order to produce the filter output signal.

    摘要翻译： 本发明涉及一种用于xDSL多标准输入级的Σ-Δ模拟/数字转换器，用于将xDSL信号转换成数字输出信号，其中Σ-Δ模拟/数字转换器（1）具有：模拟环路滤波器 6），其对要转换的xDSL信号和反馈信号之间的模拟差分信号进行滤波，以产生滤波器输出信号; 量化器，其量化来自模拟环路滤波器（6）的滤波器输出信号，以产生数字输出信号; 第一数字/模拟转换器（16），其将数字输出信号转换成模拟反馈信号; 其中模拟环路滤波器（6）具有至少两个分别包括第一积分器（6a-1; 6b-1）和第二积分器（6a-2; 6b-2）的谐振器滤波器级（6a，6b） 其中第二积分器（6a-2; 6b-2）可以通过可控反馈开关（6a-3,6b-3）按顺序连接到第一积分器（6a-1,6b-1） 以闭合局部反馈回路，其中积分器输出可以分别通过可控开关（25）连接到加法器（27）的信号输入端，加法器（27）的信号输入相加来自积分器的输出信号，以产生滤波器输出信号 。

    Semi-conductor circuit arrangement
    8.
    发明授权
    Semi-conductor circuit arrangement 有权
    半导体电路布置

    公开(公告)号：US06989778B2

    公开(公告)日：2006-01-24

    申请号：US10938741

    申请日：2004-09-10

    申请人： Martin Clara ,  Antonio Di Giandomenico ,  Andreas Wiesbauer

    发明人： Martin Clara ,  Antonio Di Giandomenico ,  Andreas Wiesbauer

    IPC分类号： H03M3/00

    CPC分类号： H03M3/39 ,  H03M3/424 ,  H03M3/452 ,  H03M3/454

    摘要： A semi-conductor circuit arrangement for a continuous time sigma delta modulator for adding analog input signals to a digital fed back signal and for quantizing the totalled signal comprises a voltage to current conversion circuit (10), an adding circuit (20) with a resistor ladder, a quantizing circuit (40) with comparator elements (45) and a digital to analog conversion circuit (30). For each comparator element (45) its respective input signal is formed by a voltage which is released between a tap in front of a corresponding tapping resistor (22) in a first string of the resistor ladder and a tap in front of a corresponding tapping resistor (22) in a second string of the resistor ladder.

    摘要翻译： 一种用于将模拟输入信号加到数字反馈信号并用于量化总计信号的连续时间Σ-Δ调制器的半导体电路装置包括电压 - 电流转换电路（10），具有电阻的加法电路（20） 梯形图，具有比较器元件（45）和数模转换电路（30）的量化电路（40）。 对于每个比较器元件（45），其相应的输入信号由在电阻梯的第一串中的对应的分接电阻器（22）前面的抽头和相应的分接电阻器前面的抽头之间的抽头释放的电压形成 （22）在电阻梯的第二串中。

    Sigma-delta analog-digital converter for an xDSL multistandard input stage
    9.
    发明授权
    Sigma-delta analog-digital converter for an xDSL multistandard input stage 失效
    用于xDSL多标准输入级的Sigma-delta模数转换器

    公开(公告)号：US07576670B2

    公开(公告)日：2009-08-18

    申请号：US11661627

    申请日：2004-09-02

    申请人： Martin Clara ,  Antonio Di Giandomenico ,  Joerg Hauptmann ,  Andreas Wiesbauer

    发明人： Martin Clara ,  Antonio Di Giandomenico ,  Joerg Hauptmann ,  Andreas Wiesbauer

    IPC分类号： H03M3/00

    CPC分类号： H03M3/394 ,  H03M3/406 ,  H03M3/424 ,  H03M3/452

    摘要： The invention relates to a sigma-delta analogue/digital converter for an xDSL multi-standard input stage for converting an xDSL signal into a digital output signal, where the sigma-delta analogue/digital converter (1) has: an analogue loop filter (6) which filters an analogue difference signal between the xDSL signal to be converted and a feedback signal in order to produce a filter output signal; a quantizer which quantizes the filter output signal from the analogue loop filter (6) in order to produce the digital output signal; a first digital/analogue converter (16) which converts the digital output signal into the analogue feedback signal; where the analogue loop filter (6) has at least two resonator filter stages (6a, 6b) which respectively comprise a first integrator (6a-1; 6b-1) and a second integrator (6a-2; 6b-2) connected in series therewith, where the second integrator (6a-2; 6b-2) can be connected to the first integrator (6a-1, 6b-1) by means of a controllable feedback switch (6a-3, 6b-3) in order to close a local feedback loop, where the integrator outputs can respectively be connected by means of a controllable switch (25) to a signal input of an adder (27) which adds the output signals from the integrators in order to produce the filter output signal.

    摘要翻译： 本发明涉及一种用于xDSL多标准输入级的Σ-Δ模拟/数字转换器，用于将xDSL信号转换成数字输出信号，其中Σ-Δ模拟/数字转换器（1）具有：模拟环路滤波器 6），其对要转换的xDSL信号和反馈信号之间的模拟差分信号进行滤波，以产生滤波器输出信号; 量化器，其量化来自模拟环路滤波器（6）的滤波器输出信号，以产生数字输出信号; 第一数字/模拟转换器（16），其将数字输出信号转换成模拟反馈信号; 其中模拟环路滤波器（6）具有至少两个分别包括第一积分器（6a-1; 6b-1）和第二积分器（6a-2; 6b-2）的谐振器滤波器级（6a，6b） 其中第二积分器（6a-2; 6b-2）可以通过可控反馈开关（6a-3,6b-3）按顺序连接到第一积分器（6a-1,6b-1） 以闭合局部反馈回路，其中积分器输出可以分别通过可控开关（25）连接到加法器（27）的信号输入端，加法器（27）的信号输入相加来自积分器的输出信号，以产生滤波器输出信号 。