Control circuit for switching inductive loads
    1.
    发明授权
    Control circuit for switching inductive loads 失效
    用于切换感性负载的控制电路

    公开(公告)号:US4549095A

    公开(公告)日:1985-10-22

    申请号:US441851

    申请日:1982-11-15

    CPC分类号: H03K17/64 H03K17/04126

    摘要: A control circuit for switching inductive loads which can be monolithically integrated and used in high-speed printing equipment and in chopper power supply systems. The circuit includes a final power transistor, driven for switching by means of a drive transistor coupled to its control terminal. A speedup circuit is connected to the control terminals of both of the transistors in order to accelerate the turning off of the transistors by reducing the discharge time thereof. Such a speedup circuit is enabled so as to remove charge carriers only for a period of time which begins when the transistors are turned off in order to avoid additional time delays when the transistors are subsequently turned on again.

    摘要翻译: 用于切换感应负载的控制电路,其可以单片集成并用于高速打印设备和斩波电源系统中。 该电路包括一个最终的功率晶体管,驱动用于通过耦合到其控制端的驱动晶体管来切换。 加速电路连接到两个晶体管的控制端,以便通过减少晶体管的放电时间来加速晶体管的截止。 这样的加速电路被启用,以便仅在晶体管截止时开始的时间段内去除电荷载体,以便在再次接通晶体管时避免额外的时间延迟。

    Monolithically integratable bistable multivibrator circuit having at
least one output that can be placed in a preferential state
    2.
    发明授权
    Monolithically integratable bistable multivibrator circuit having at least one output that can be placed in a preferential state 失效
    具有可置于优先状态的至少一个输出的单片可积分双稳态多谐振荡器电路

    公开(公告)号:US4553046A

    公开(公告)日:1985-11-12

    申请号:US498595

    申请日:1983-05-26

    CPC分类号: H03K3/288

    摘要: A bistable multivibrator circuit includes two main transistors and two other transistors and an additional pair of transistors. The multivibrator circuit can be monolithically integrated and has an output that can be placed in a preferential state. The two other transistors are utilized to set and reset the multivibrator circuit while the two additional transistors form a control circuit for controlling the multivibrator circuit so as to cause its outputs to be in a prescribed preferential state.

    摘要翻译: 双稳态多谐振荡器电路包括两个主晶体管和另外两个晶体管以及另外一对晶体管。 多谐振荡器电路可以是单片集成的并且具有可以被置于优先状态的输出。 另外两个晶体管用于设置和复位多谐振荡器电路,而两个附加晶体管形成用于控制多谐振荡器电路的控制电路,以使其输出处于规定的优先状态。

    Control circuit for the switching of inductive loads having a push-pull
output stage
    3.
    发明授权
    Control circuit for the switching of inductive loads having a push-pull output stage 失效
    用于切换具有推挽输出级的感性负载的控制电路

    公开(公告)号:US4612452A

    公开(公告)日:1986-09-16

    申请号:US476374

    申请日:1983-03-17

    CPC分类号: H03K17/667 H03K17/04126

    摘要: A control circuit for the switching of inductive loads which is monolithically integratable and includes an output stage having push-pull transistors. The base of each transistor of the output stage is connected to a driver circuit and to an auxiliary transistor which is biased in saturation. Each auxiliary transistor is driven to conduction in phase opposition with respect to the final transistor to which it is connected. The auxiliary transistor accelerates the turn-off of the final transistor, withdrawing the base charge, while delaying the turn-on thereof and absorbing the current fed thereto for a period of time equal to that of its own turn-off transient; in this way, the simultaneous conduction of the transistors of the final stage during the switching thereof can be avoided.

    摘要翻译: 一种用于切换感性负载的控制电路,其是单片可积分的并且包括具有推挽晶体管的输出级。 输出级的每个晶体管的基极连接到驱动电路和被饱和的偏置的辅助晶体管。 每个辅助晶体管被驱动为相对于其所连接的最终晶体管的相位相反的导通。 辅助晶体管加速最终晶体管的截止,取出基极电荷,同时延迟其导通并吸收馈送到其的电流等于其自身关断瞬变的时间; 以这种方式,可以避免在其切换期间最后级的晶体管的同时导通。

    Bipolar-plus-DMOS mixed-typology power output stage
    4.
    发明授权
    Bipolar-plus-DMOS mixed-typology power output stage 失效
    双极加DMOS混合型功率输出级

    公开(公告)号:US06222414B1

    公开(公告)日:2001-04-24

    申请号:US08351578

    申请日:1994-12-07

    IPC分类号: H03K300

    摘要: An output power stage which includes a PNP pull-up transistor and an n-channel FET push-down transistor, driven in phase opposition. This fully complementary stage provides an outstandingly improved power handling capability per semiconductor area occupied, together with a large output voltage swing, but does not require the use of externally connected discrete boot-strap components. The bipolar pull-up transistor can optionally be driven through an FET auxiliary stage, to minimize the power requirements of the preceding signal amplification stage.

    摘要翻译: 输出功率级,其包括PNP上拉晶体管和n沟道FET下拉晶体管,其相位驱动。 这个完全互补的阶段为每个占用的半导体面积提供了出色的功率处理能力,以及大的输出电压摆幅,但不需要使用外部连接的分立式引导部件。 双极上拉晶体管可以可选地通过FET辅助级驱动,以最小化前一信号放大级的功率需求。

    Intrinsic offset recovery circuit particularly for amplifiers
    5.
    发明授权
    Intrinsic offset recovery circuit particularly for amplifiers 失效
    内置偏移电路,特别适用于放大器

    公开(公告)号:US5204638A

    公开(公告)日:1993-04-20

    申请号:US808492

    申请日:1991-12-17

    IPC分类号: H03F3/34 H03F3/343 H03F3/45

    CPC分类号: H03F3/45479 H03F3/3437

    摘要: Intrinsic offset recovery circuit particularly for amplifiers, which comprises an input differential amplifier constituted by a first PNP transistor, by a second PNP transistor, by a third NPN transistor, by a fourth NPN transistor and by a first constant-current source, and a unitary-gain output stage. The recovery circuit furthermore comprises, as connection between the input differential amplifier and the unitary-gain output stage, a gain stage which comprises a fifth NPN transistor which is connected to the output of the input differential amplifier and is connected to a sixth NPN transistor and to a seventh PNP transistor. The seventh transistor is connected to the sixth transistor. The seventh transistor and the sixth transistor are connected to the unitary-gain output stage.

    Power stage with increased output dynamics
    6.
    发明授权
    Power stage with increased output dynamics 失效
    功率级增加输出动力

    公开(公告)号:US4916408A

    公开(公告)日:1990-04-10

    申请号:US277078

    申请日:1988-11-28

    CPC分类号: H03F1/0261 H03F3/211

    摘要: An improved power stage with increased output dynamics. The stage comprises a power amplifier having a first inverting input, a second non-inverting input, an output to be connected to a load and a feedback network comprising a first resistor connected between the inverting input and the output of the power amplifier and a second resistor connected between the first inverting input and a first line set to a first reference voltage by means of a voltage generator with preset values. The stage furthermore comprises an input voltage generator generating an input voltage signal to be amplified and connected between the second non-inverting input and a second line set to a second reference voltage different from said first reference voltage. In order to increase the output dynamics, in particular in the case of low power supply voltage, said voltage generator arranged between the second resistor and said input voltage generator, and generating a voltage which is variable in inverse proportion to the input voltage signal, with respect to the second reference voltage.

    Amplifier stage with collector output
    7.
    发明授权
    Amplifier stage with collector output 失效
    放大器级采集器输出

    公开(公告)号:US4878032A

    公开(公告)日:1989-10-31

    申请号:US180743

    申请日:1988-04-12

    CPC分类号: H03K17/0422 H03K17/667

    摘要: This amplifier stage has saturation control and high dynamics. The stage comprises a pair of input current sources connected in series between a pair of reference voltage lines, a pair of output transistors, connected between the pair of reference voltage lines and defining an intermediate output terminal and a driving circuit comprising active elements and interposed between the input current sources and the output transistors. Saturation control is achieved through a pair of control circuits, one for each output transistor, comprising each a resistor interposed between the driving circuit and the respective output transistor so as to preset the balance saturation gain of the respective output transistor, and a transistor connected with its base to the driving circuit and with its collector and emitter between the output of the amplifier stage and the intermediate connection point between the input current sources, so as to define a negative feedback reducing imbalances existing between the currents fed by the input current sources, and therefore prevent high saturation levels of the transistors.

    摘要翻译: 该放大器级具有饱和控制和高动态特性。 该级包括串联连接在一对参考电压线之间的一对输入电流源,一对输出晶体管,连接在该对参考电压线之间并且限定中间输出端和包括有源元件的驱动电路并且插入在 输入电流源和输出晶体管。 通过一对控制电路来实现饱和度控制,一对每个输出晶体管,每个控制电路包括插入在驱动电路和相应的输出晶体管之间的电阻器,以便预设相应输出晶体管的平衡饱和增益,以及与 其基极到驱动电路,并且其集电极和发射极在放大器级的输出端和输入电流源之间的中间连接点之间,以便限定负反馈,减少由输入电流源馈送的电流之间存在的不平衡, 并因此防止晶体管的高饱和度。

    Device for protecting the final stage of a power amplifier against
shorting
    8.
    发明授权
    Device for protecting the final stage of a power amplifier against shorting 失效
    用于保护功率放大器的最后级以防短路的装置

    公开(公告)号:US4714898A

    公开(公告)日:1987-12-22

    申请号:US872081

    申请日:1986-06-06

    IPC分类号: H03F1/42 H03F1/52

    CPC分类号: H03F1/52

    摘要: A device is disclosed for protecting against shorts the transistors of the push-pull stage in a power amplifier operating on a low voltage supply, in particular for car radio sets. The device comprises sensors which are responsive to currents flowing through the two transistors which form the amplifier push-pull stage, and current-to-voltage converters which convert the sensed currents into corresponding respective voltage signals. The latter are compared in respective voltage-comparing circuits with a reference voltage indicative of the highest admissible current through either of the transistors while the other is shorted. The device also comprises two additional voltage comparators wherein the voltage applied to the load, which may be of a resistive or a reactive type, is compared with a set reference voltage which is lower than or in the extreme equal to, in absolute value, the voltage supply to the amplifier push-pull stage. If the voltages being compared exceed in absolute value the set reference voltages, then the output signals from the comparators energize either of the two bistable circuits to cut off the power supply to the amplifier. The device affords a clear cut between shorted and normal operation conditions, and requires no high current peaks to become operative and activate the protection. After the shorted condition is removed, the device provides automatically for restoring the power supply to the amplifier.

    摘要翻译: 公开了一种用于防止在低电压电源(特别是汽车无线电设备)上工作的功率放大器中的推挽级晶体管短路的装置。 该装置包括响应于流过形成放大器推挽级的两个晶体管的电流的传感器,以及将感测电流转换成对应的相应电压信号的电流 - 电压转换器。 后者在相应的电压比较电路中与参考电压进行比较,该参考电压指示通过任一晶体管的最高容许电流,而另一个短路。 该装置还包括两个额外的电压比较器,其中施加到负载的电压(其可以是电阻或无功类型)与设置的参考电压进行比较,该参考电压低于或绝对等于 向放大器推挽级供电。 如果被比较的电压超过设定的参考电压的绝对值,则来自比较器的输出信号为两个双稳态电路中的任一个通电以切断放大器的电源。 该器件在短路和正常工作条件之间提供了明确的切割,并且不需要高电流峰值来工作并激活保护。 在短路状态被去除之后,该装置自动提供用于恢复放大器的电源。

    Full CMOS slew rate controlled input/output buffer
    9.
    发明授权
    Full CMOS slew rate controlled input/output buffer 有权
    全CMOS压摆率控制输入/输出缓冲器

    公开(公告)号:US06160416A

    公开(公告)日:2000-12-12

    申请号:US205037

    申请日:1998-12-04

    CPC分类号: H03K17/166 H03K19/00361

    摘要: An output buffer circuit including an input node, an output stage, an output node that is connected to the output stage, and a control circuit that controls voltage variations during the rising and falling edges of the output signal. The control circuit compares the levels of the input signal and the output signal and drives the output stage. In a preferred embodiment, the control circuit includes first and second logic circuits that are each connected to the input and output nodes. The first logic circuit selectively enables operation of a first driving circuit, and the second logic circuit selectively enables operation of a second driving circuit. Additionally, a method for slew rate control during rising and falling edges of an output signal of an output buffer circuit is provided. According to the method, the level of the output signal and the level of the input signal are compared. If the input and output signals have different levels, a current is injected into or taken from the output node. In one preferred method, the current is injected or taken by controlling a first driving circuit so as to inject a current into the output node or controlling a second driving circuit so as to take a current from the output node.

    摘要翻译: 输出缓冲电路,包括输入节点,输出级,连接到输出级的输出节点,以及控制电路,其控制输出信号的上升沿和下降沿期间的电压变化。 控制电路比较输入信号和输出信号的电平并驱动输出级。 在优选实施例中,控制电路包括各自连接到输入和输出节点的第一和第二逻辑电路。 第一逻辑电路选择性地使第一驱动电路工作,第二逻辑电路有选择地使第二驱动电路工作。 另外,提供了一种在输出缓冲电路的输出信号的上升沿和下降沿期间进行压摆率控制的方法。 根据该方法,比较输出信号的电平和输入信号的电平。 如果输入和输出信号具有不同的电平,则将电流注入或从输出节点取出。 在一种优选的方法中,通过控制第一驱动电路来注入或取出电流,以将电流注入输出节点或控制第二驱动电路以便从输出节点获取电流。

    High-dynamics amplifier stage with distortion detection
    10.
    发明授权
    High-dynamics amplifier stage with distortion detection 失效
    具有失真检测功能的高动力放大器级

    公开(公告)号:US4849713A

    公开(公告)日:1989-07-18

    申请号:US202846

    申请日:1988-06-06

    IPC分类号: H03F1/32 H03G3/20

    CPC分类号: H03G3/3005 H03F1/3217

    摘要: In an amplifier stage comprising a pair of input current sources, connected in series between a pair of reference potential lines, a pair of output transistors connected between the pair of reference potential lines and defining an intermediate output terminal of the amplifier, a driving circuit comprising active elements and interposed between the input current source and the output transistors, and at least one saturation control circuit comprising at least one control transistor connected with its base to the driving circuit and with its collector and emitter between the output of the amplifier stage and the intermediate point between the input current sources, to detect distortion due to clipping, at least one distribution detection transistor is provided, connected to the control transistor so as to detect the current flowing through the latter, which current is related to the imbalance of the input current sources and therefore to the distortion generated in the stage.