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    Bare die carrier
    1.
    发明授权
    Bare die carrier 失效
    裸机载体

    公开(公告)号：US06937044B1

    公开(公告)日：2005-08-30

    申请号：US09534729

    申请日：2000-03-24

    申请人： Fariborz Agahdel ,  Brad Griswold ,  Syed Husain ,  Robert Moti ,  William C. Robinette, Jr. ,  Chung W. Ho

    发明人： Fariborz Agahdel ,  Brad Griswold ,  Syed Husain ,  Robert Moti ,  William C. Robinette, Jr. ,  Chung W. Ho

    IPC分类号： G01R1/04 ,  G01R31/28 ,  G01R31/02

    CPC分类号： G01R31/2884 ,  G01R1/0483

    摘要： A bare semiconductor circuit die carrier is provided for use in the test of semiconductor circuits, the carrier, comprising: a substrate defining an opening and an outer perimeter; a multiplicity of I/O pads disposed about the perimeter; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed in a polymer dielectric; wherein the interconnect circuit overlays a top surface of the substrate and extends across the opening so as to form a flexible membrane that spans the opening; a multiplicity of die contact pads connected to the conductors are disposed about the flexible membrane with particles deposited on the die contact pads; a fence upstanding from the membrane and sized to receive a test die; a top cap that rests upon the die when the die is received within the fence; a bottom cap that rests against a bottom surface of the substrate; and a fastener for securing the top cap to the bottom cap with the die disposed therebetween.

    摘要翻译： 提供裸半导体电路管芯载体用于半导体电路的测试，载体包括：限定开口和外周边的基板; 围绕周边布置的多个I / O焊盘; 互连电路，其包括形成在聚合物电介质中的多个单独电导体的复合物; 其中所述互连电路覆盖所述衬底的顶表面并延伸穿过所述开口以便形成跨越所述开口的柔性膜; 连接到导体的多个裸片接触焊盘围绕柔性膜设置，其中沉积在裸片接触焊盘上的颗粒; 从膜上直立的栅栏，尺寸适合接收测试模具; 当模具被接收在围栏内时，顶盖靠在模具上; 底盖靠在基底的底表面上; 以及用于将顶盖固定到底盖的紧固件，其间设置有模具。

    Bare die carrier
    2.
    发明授权
    Bare die carrier 失效
    裸机载体

    公开(公告)号：US5402077A

    公开(公告)日：1995-03-28

    申请号：US979719

    申请日：1992-11-20

    申请人： Fariborz Agahdel ,  Brad Griswold ,  Syed Husain ,  Robert Moti ,  William C. Robinette, Jr. ,  Chung W. Ho

    发明人： Fariborz Agahdel ,  Brad Griswold ,  Syed Husain ,  Robert Moti ,  William C. Robinette, Jr. ,  Chung W. Ho

    IPC分类号： G01R31/26 ,  G01R1/04 ,  G01R31/28 ,  H01L21/66

    CPC分类号： G01R31/2884 ,  G01R1/0483 ,  H01L2224/49171 ,  H01L2924/01014 ,  H01L2924/01067 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/14

    摘要： An integrated circuit carrier comprising: a substrate defining an opening and an outer perimeter; a multiplicity of I/O pads disposed about the perimeter; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed in a polymer dielectric; wherein the interconnect circuit overlays a top surface of the substrate and extends across the opening so as to span the opening; a multiplicity of die contact pads connected to the conductors are disposed about the flexible polymer dielectric with particles deposited on the die contact pads; a polymer dielectric fence upstanding from the membrane and sized to receive an integrated circuit; a top cap that rests upon the integrated circuit when the integrated circuit is received within the fence; a bottom cap that rests against a bottom surface of the substrate; and a fastener for securing the top cap to the bottom cap with the integrated circuit disposed therebetween.

    摘要翻译： 一种集成电路载体，包括：限定开口和外周边的基板; 围绕周边布置的多个I / O焊盘; 互连电路，其包括形成在聚合物电介质中的多个单独电导体的复合物; 其中所述互连电路覆盖所述衬底的顶表面并延伸穿过所述开口以跨越所述开口; 连接到导体的多个裸片接触焊盘设置在柔性聚合物电介质周围，颗粒沉积在芯片接触焊盘上; 聚合物绝缘栅栏，从膜上直立并且尺寸适于接收集成电路; 当集成电路接收在栅栏内时，顶盖位于集成电路上; 底盖靠在基底的底表面上; 以及用于将顶盖固定到底盖的紧固件，其间设置有集成电路。

    Bare die carrier
    3.
    发明授权
    Bare die carrier 失效
    裸机载体

    公开(公告)号：US6049215A

    公开(公告)日：2000-04-11

    申请号：US542685

    申请日：1995-10-12

    申请人： Fariborz Agahdel ,  Brad Griswold ,  Syed Husain ,  Robert Moti ,  William C. Robinette, Jr. ,  Chung W. Ho

    发明人： Fariborz Agahdel ,  Brad Griswold ,  Syed Husain ,  Robert Moti ,  William C. Robinette, Jr. ,  Chung W. Ho

    IPC分类号： G01R31/26 ,  G01R1/04 ,  G01R31/28 ,  H01L21/66 ,  G01R31/02

    CPC分类号： G01R31/2884 ,  G01R1/0483 ,  H01L2224/49171 ,  H01L2924/01014 ,  H01L2924/01067 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/14

    摘要： A bare semiconductor circuit die carrier is provided for use in the test of semiconductor circuits, the carrier, comprising: a substrate defining an opening and an outer perimeter; a multiplicity of I/O pads disposed about the perimeter; an interconnect circuit which includes a composite of a multiplicity of individual electrical conductors which are formed in a polymer dielectric; wherein the interconnect circuit overlays a top surface of the substrate and extends across the opening so as to form a flexible membrane that spans the opening; a multiplicity of die contact pads connected to the conductors are disposed about the flexible membrane with particles deposited on the die contact pads; a fence upstanding from the membrane and sized to receive a test die; a top cap that rests upon the die when the die is received within the fence; a bottom cap that rests against a bottom surface of the substrate; and a fastener for securing the top cap to the bottom cap with the die disposed therebetween.

    摘要翻译： 提供裸半导体电路管芯载体用于半导体电路的测试，载体包括：限定开口和外周边的基板; 围绕周边布置的多个I / O焊盘; 互连电路，其包括形成在聚合物电介质中的多个单独电导体的复合物; 其中所述互连电路覆盖所述衬底的顶表面并延伸穿过所述开口以便形成跨越所述开口的柔性膜; 连接到导体的多个裸片接触焊盘围绕柔性膜设置，其中沉积在裸片接触焊盘上的颗粒; 从膜上直立的栅栏，尺寸适合接收测试模具; 当模具被接收在围栏内时，顶盖靠在模具上; 底盖靠在基底的底表面上; 以及用于将顶盖固定到底盖的紧固件，其间设置有模具。