Analog-to-digital and digital-to-analog conversion window adjustment based on reference cells in a memory device
    5.
    发明授权
    Analog-to-digital and digital-to-analog conversion window adjustment based on reference cells in a memory device 有权
    基于存储器件中的参考单元的模数和数模转换窗口调整

    公开(公告)号:US08787103B2

    公开(公告)日:2014-07-22

    申请号:US13187665

    申请日:2011-07-21

    IPC分类号: G11C7/02

    摘要: An analog-to-digital conversion window is defined by reference voltages stored in reference memory cells of a memory device. A first reference voltage is read to define an upper limit of the conversion window and a second reference voltage is read to define a lower limit of the conversion window. An analog voltage representing a digital bit pattern is read from a memory cell and converted to the digital bit pattern by an analog-to-digital conversion process using the conversion window as the limits for the sampling process. This scheme helps in real time tracking of the ADC window with changes in the program window of the memory array.

    摘要翻译: 模数转换窗口由存储在存储器件的参考存储单元中的参考电压定义。 读取第一参考电压以限定转换窗口的上限,并且读取第二参考电压以定义转换窗口的下限。 表示数字位模式的模拟电压从存储单元读取,并通过使用转换窗口作为采样处理的限制的模数转换处理转换为数字位模式。 该方案通过存储器阵列的程序窗口的改变,有助于实时跟踪ADC窗口。

    ANALOG SENSING OF MEMORY CELLS WITH A SOURCE FOLLOWER DRIVER IN A SEMICONDUCTOR MEMORY DEVICE
    7.
    发明申请
    ANALOG SENSING OF MEMORY CELLS WITH A SOURCE FOLLOWER DRIVER IN A SEMICONDUCTOR MEMORY DEVICE 有权
    用半导体存储器件中的源极驱动器对存储器电池进行模拟感测

    公开(公告)号:US20120307576A1

    公开(公告)日:2012-12-06

    申请号:US13572174

    申请日:2012-08-10

    IPC分类号: G11C7/00

    摘要: Memory devices, methods, and sample and hold circuits are disclosed, including a memory device that includes a sample and hold circuit coupled to a bit line. One such sample and hold circuit includes a read circuit, a verify circuit, and a reference circuit. The read circuit stores a read threshold voltage that was read from a selected memory cell. The verify circuit stores a target threshold voltage that is compared to the read threshold voltage to generate an inhibit signal when the target and read threshold voltages are substantially equal. The reference circuit stores a reference threshold voltage that can be used to translate the read threshold voltage to compensate for a transistor voltage drop and/or temperature variations.

    摘要翻译: 公开了存储器件,方法和采样和保持电路,包括包括耦合到位线的采样和保持电路的存储器件。 一个这样的采样和保持电路包括读取电路,验证电路和参考电路。 读取电路存储从所选存储单元读取的读取阈值电压。 验证电路存储与读取的阈值电压相比较的目标阈值电压,以在目标和读取阈值电压基本相等时产生禁止信号。 参考电路存储参考阈值电压,该参考阈值电压可用于转换读取阈值电压以补偿晶体管电压降和/或温度变化。

    Mitigation of data corruption from back pattern and program disturb in a non-volatile memory device
    9.
    发明授权
    Mitigation of data corruption from back pattern and program disturb in a non-volatile memory device 有权
    缓解非易失性存储设备中的后台模式和程序干扰造成的数据损坏

    公开(公告)号:US08274833B2

    公开(公告)日:2012-09-25

    申请号:US13354453

    申请日:2012-01-20

    IPC分类号: G11C16/04

    CPC分类号: G11C16/3418

    摘要: A write algorithm is used to remove errors due to back pattern effects, cell-to-cell capacitive coupling, and program disturb in memory cells. Original data to be programmed is adjusted prior to an initial programming operation of the memory cells. The original data is then programmed into the memory cells in another programming operation. A read adjustment weight data value is associated with each series string of memory cells. The weight data value is used to compensate data read during an initial word line read. The weight data value is updated after each read and read adjustment such that the adjusted weight data value is used on the subsequent read operations.

    摘要翻译: 使用写入算法来消除由于存储器单元中的反向图案效应,单元到单元电容耦合以及程序干扰引起的错误。 要编程的原始数据在存储器单元的初始编程操作之前被调整。 然后在另一个编程操作中将原始数据编程到存储器单元中。 读取调整权重数据值与存储器单元的每个串联串相关联。 权重数据值用于补偿在初始字线读取期间读取的数据。 在每次读取和读取调整之后更新权重数据值,使得在随后的读取操作中使用经调整的权重数据值。