COLD-CRANK EVENT MANAGEMENT
    1.
    发明申请
    COLD-CRANK EVENT MANAGEMENT 有权
    冷起动事件管理

    公开(公告)号:US20150211470A1

    公开(公告)日:2015-07-30

    申请号:US14166891

    申请日:2014-01-29

    IPC分类号: F02N11/08

    摘要: Systems and methods for managing cold-crank events. In an embodiment, a method may include detecting a cold-crank event and setting a switching circuit to a non-conductive state, where the switching circuit is configured to couple a first regulator to a memory circuit such that setting the switching circuit to the non-conductive state de-couples the memory circuit from the first regulator. The method may also include setting the switching circuit to a conductive state in current limitation mode during a recovery period following the cold-crank event to re-couple the memory circuit to the first regulator. In another embodiment, an electronic device include a switching circuit, a first regulator coupled to a first terminal of the switching circuit, a second regulator coupled to a second terminal of the switching circuit, a logic circuit coupled to the switching circuit, and a memory circuit coupled to the second terminal of the switching circuit.

    摘要翻译: 用于管理冷曲轴事件的系统和方法。 在一个实施例中,方法可以包括检测冷曲轴事件并将开关电路设置为非导通状态,其中开关电路被配置为将第一调节器耦合到存储器电路,使得将开关电路设置为非导通状态 存储电路与第一调节器解耦。 该方法还可以包括在冷启动事件之后的恢复周期期间将开关电路设置为电流限制模式中的导通状态,以将存储器电路重新耦合到第一调节器。 在另一个实施例中,电子设备包括开关电路,耦合到开关电路的第一端子的第一调节器,耦合到开关电路的第二端子的第二调节器,耦合到开关电路的逻辑电路和存储器 电路耦合到开关电路的第二端子。

    POWER SWITCH WITH CURRENT LIMITATION AND ZERO DIRECT CURRENT (DC) POWER CONSUMPTION
    2.
    发明申请
    POWER SWITCH WITH CURRENT LIMITATION AND ZERO DIRECT CURRENT (DC) POWER CONSUMPTION 有权
    电流限制和零直流(DC)消耗功率开关

    公开(公告)号:US20150054477A1

    公开(公告)日:2015-02-26

    申请号:US13973697

    申请日:2013-08-22

    IPC分类号: H02M3/158

    摘要: Power switches with current limitation and zero Direct Current (DC) power consumption. In an embodiment, an integrated circuit includes switching circuitry coupled between a voltage supply node and a given one of a plurality of power domains, the switching circuitry configured to limit an amount of current drawn by the given power domain from the voltage supply node during a transition period, the switching circuitry further configured to consume zero DC power outside of the transition period. In another embodiment, a method includes controlling, via a switching circuit coupled between a voltage supply and an integrated circuit, an amount of current drawn by the integrated circuit from the voltage supply during a transition period; and causing the switching circuit to consume no static power during periods of time other than the transition period.

    摘要翻译: 具有电流限制和零直流(DC)功耗的电源开关。 在一个实施例中,集成电路包括耦合在电压供应节点和多个功率域中给定的一个功率域之间的开关电路,该开关电路被配置为在一个电源供应节点期间限制由给定功率域从电压供应节点汲取的电流量 所述开关电路还被配置为在所述过渡周期之外消耗零DC电力。 在另一个实施例中,一种方法包括通过耦合在电压源和集成电路之间的开关电路来控制在过渡期间由集成电路从电压源汲取的电流量; 并且使转换电路在过渡期以外的时间段内不消耗静态电力。

    POWER GATING TECHNIQUES WITH SMOOTH TRANSITION
    3.
    发明申请
    POWER GATING TECHNIQUES WITH SMOOTH TRANSITION 有权
    具有平滑过渡的功率增益技术

    公开(公告)号:US20150194887A1

    公开(公告)日:2015-07-09

    申请号:US14151337

    申请日:2014-01-09

    IPC分类号: H02M3/158 H03K3/012

    CPC分类号: H03K19/0013

    摘要: In an embodiment, an electronic device includes an integrated circuit (IC) having a plurality of power domains, a first regulator coupled to a given power domain, a second regulator coupled to the given power domain, and a switching circuit coupled between the first and second regulators and configured to control an amount of current drawn by the power domain from the first and/or second regulators. In another embodiment, a method includes controlling an impedance of a switching circuit to change an amount of current, the switching circuit coupled to a given power domain of an IC configured to operate in a first mode followed by a second mode, where the switching circuit is coupled to a first regulator configured to provide more power to the IC than a second regulator, and a transition period includes turning off the first regulator and turning on the second regulator.

    摘要翻译: 在一个实施例中,电子设备包括具有多个功率域的集成电路(IC),耦合到给定功率域的第一调节器,耦合到给定功率域的第二调节器,以及耦合在第一和第 第二调节器并且被配置为控制来自第一和/或第二调节器的功率域所绘制的电流量。 在另一个实施例中,一种方法包括控制切换电路的阻抗以改变电流量,所述开关电路耦合到被配置为以第一模式操作的IC的给定功率域,其中是第二模式,其中所述开关电路 被耦合到被配置为比第二调节器向IC提供更多功率的第一调节器,并且过渡时段包括关闭第一调节器并接通第二调节器。

    TEMPERATURE DEPENDENT BIASING FOR LEAKAGE POWER REDUCTION
    4.
    发明申请
    TEMPERATURE DEPENDENT BIASING FOR LEAKAGE POWER REDUCTION 有权
    用于泄漏功率降低的温度依赖偏置

    公开(公告)号:US20150084684A1

    公开(公告)日:2015-03-26

    申请号:US14035704

    申请日:2013-09-24

    IPC分类号: G05F3/24 H03K17/14

    摘要: Temperature dependent biasing for leakage power reduction. In some embodiments, a semiconductor device may include a biasing circuit configured to generate a voltage that varies dependent upon a temperature of the semiconductor device and a logic circuit operably coupled to the biasing circuit, where the voltage is applied to a bulk terminal of one or more transistors within the logic circuit, and where the voltage has a value outside of a voltage supply range of the logic circuit. In another embodiment, a semiconductor device may include a biasing circuit configured to generate a voltage that varies according to a temperature of the semiconductor device and a power switch operably coupled to the biasing circuit, where the voltage is applied to a gate terminal of the power switch, and where the voltage has a value outside of a voltage supply range of the power switch.

    摘要翻译: 温度依赖偏置以降低泄漏功率。 在一些实施例中,半导体器件可以包括偏置电路,其被配置为产生根据半导体器件的温度而变化的电压,以及可操作地耦合到偏置电路的逻辑电路,其中电压被施加到一个或 逻辑电路内的多个晶体管,并且其中电压具有在逻辑电路的电压供应范围之外的值。 在另一个实施例中,半导体器件可以包括偏置电路,其被配置为产生根据半导体器件的温度而变化的电压和可操作地耦合到偏置电路的功率开关,其中电压施加到功率的栅极端子 开关,电压值在电源开关的电源电压范围之外。

    Power monitoring circuitry
    5.
    发明授权
    Power monitoring circuitry 有权
    电源监控电路

    公开(公告)号:US08901991B2

    公开(公告)日:2014-12-02

    申请号:US13848348

    申请日:2013-03-21

    IPC分类号: H03K17/00

    摘要: Power monitoring circuitry. In some embodiments, comparator circuitry may be configured to receive a first voltage value and a second voltage value, and to identify the greater of the first and second voltage values. Selector circuitry coupled to the comparator circuitry may be configured to power one or more components within the comparator circuitry with a supply voltage corresponding to the greater voltage value. In other embodiments, a method may include identifying, via a comparator, the largest among a plurality of voltage values, and powering one or more logic components within the comparator with the identified voltage value.

    摘要翻译: 电源监控电路。 在一些实施例中,比较器电路可以被配置为接收第一电压值和第二电压值,并且识别第一和第二电压值中较大者。 耦合到比较器电路的选择器电路可以被配置为用对应于较大电压值的电源电压为比较器电路内的一个或多个组件供电。 在其他实施例中,方法可以包括通过比较器识别多个电压值中的最大值,以及利用所识别的电压值为比较器内的一个或多个逻辑组件供电。

    Cold-crank event management
    6.
    发明授权

    公开(公告)号:US09644593B2

    公开(公告)日:2017-05-09

    申请号:US14166891

    申请日:2014-01-29

    IPC分类号: F02N11/00 F02N11/08

    摘要: Systems and methods for managing cold-crank events. In an embodiment, a method may include detecting a cold-crank event and setting a switching circuit to a non-conductive state, where the switching circuit is configured to couple a first regulator to a memory circuit such that setting the switching circuit to the non-conductive state de-couples the memory circuit from the first regulator. The method may also include setting the switching circuit to a conductive state in current limitation mode during a recovery period following the cold-crank event to re-couple the memory circuit to the first regulator. In another embodiment, an electronic device include a switching circuit, a first regulator coupled to a first terminal of the switching circuit, a second regulator coupled to a second terminal of the switching circuit, a logic circuit coupled to the switching circuit, and a memory circuit coupled to the second terminal of the switching circuit.

    Delay compensation circuit
    7.
    发明授权
    Delay compensation circuit 有权
    延时补偿电路

    公开(公告)号:US09143115B2

    公开(公告)日:2015-09-22

    申请号:US14639795

    申请日:2015-03-05

    IPC分类号: G05F1/00 H03K3/012 H02M1/08

    摘要: An integrated circuit includes a delay compensation circuit (221, 222) that further includes a terminal for receiving a varying signal from a circuit external to the integrated circuit; a sampler circuit that samples and holds a present value of the varying signal at each occurrence of a transition in a digital signal; an integrator, coupled to the sampler circuit, that integrates a voltage difference between a sample of the varying signal and a reference signal, and that outputs results of the integration, wherein a time constant of the integrator is greater than a period of the varying signal; a waveform generator that generates a decreasing voltage in response to a transition in a second digital signal; and a comparator that has one input terminal for receiving the decreasing voltage, an inverted input terminal for receiving the results, and an output terminal for outputting a signal that generates an output signal.

    摘要翻译: 集成电路包括延迟补偿电路(221,222),其还包括用于从集成电路外部的电路接收变化信号的端子; 采样器电路,其在数字信号中每次出现转换时采样和保持变化信号的当前值; 耦合到采样器电路的积分器,其对变化信号的采样和参考信号之间的电压差进行积分,并且输出积分的结果,其中积分器的时间常数大于变化信号的周期 ; 波形发生器,其响应于第二数字信号中的转变而产生降低的电压; 以及具有用于接收降低电压的一个输入端子,用于接收结果的反相输入端子和用于输出产生输出信号的信号的输出端子的比较器。

    Startup circuits with native transistors
    8.
    发明授权
    Startup circuits with native transistors 有权
    具有原生晶体管的启动电路

    公开(公告)号:US09092045B2

    公开(公告)日:2015-07-28

    申请号:US13865794

    申请日:2013-04-18

    IPC分类号: G05F3/16 G05F3/20 G05F3/30

    CPC分类号: G05F3/30

    摘要: Startup circuits with native transistors. In some embodiments, a startup circuit may include a first inverter configured to receive a bandgap voltage (Vbg) from a bandgap reference circuit and to produce an output voltage (VOUT), and a second inverter operably coupled to the first inverter to form a latch, the latch configured to maintain a value of VOUT, the second inverter including a native transistor, the native transistor having a gate terminal coupled to VOUT and a source terminal coupled to Vbg. In other embodiments, a method may include receiving Vbg at a startup circuit and outputting VOUT configured to change in response to Vbg rising above Vtrig or falling below Vtrig, where the power consumption of the startup circuit is based at least in part upon a voltage value applied to a source terminal of a native transistor within the startup circuit.

    摘要翻译: 具有原生晶体管的启动电路。 在一些实施例中,启动电路可以包括配置成从带隙参考电路接收带隙电压(Vbg)并产生输出电压(VOUT)的第一反相器,以及可操作地耦合到第一反相器以形成锁存器的第二反相器 所述锁存器被配置为保持VOUT的值,所述第二反相器包括天然晶体管,所述天线晶体管具有耦合到VOUT的栅极端子和耦合到Vbg的源极端子。 在其他实施例中,一种方法可以包括在启动电路处接收Vbg并输出被配置为响应于Vbg上升到Vtrig以上或者低于Vtrig而变化的VOUT,其中启动电路的功耗至少部分地基于电压值 施加到启动电路内的原生晶体管的源极端子。

    STARTUP CIRCUITS WITH NATIVE TRANSISTORS
    9.
    发明申请
    STARTUP CIRCUITS WITH NATIVE TRANSISTORS 有权
    启动电路与本体晶体管

    公开(公告)号:US20140312875A1

    公开(公告)日:2014-10-23

    申请号:US13865794

    申请日:2013-04-18

    IPC分类号: G05F3/30

    CPC分类号: G05F3/30

    摘要: Startup circuits with native transistors. In some embodiments, a startup circuit may include a first inverter configured to receive a bandgap voltage (Vbg) from a bandgap reference circuit and to produce an output voltage (VOUT), and a second inverter operably coupled to the first inverter to form a latch, the latch configured to maintain a value of VOUT, the second inverter including a native transistor, the native transistor having a gate terminal coupled to VOUT and a source terminal coupled to Vbg. In other embodiments, a method may include receiving Vbg at a startup circuit and outputting VOUT configured to change in response to Vbg rising above Vtrig or falling below Vtrig, where the power consumption of the startup circuit is based at least in part upon a voltage value applied to a source terminal of a native transistor within the startup circuit.

    摘要翻译: 具有原生晶体管的启动电路。 在一些实施例中,启动电路可以包括配置成从带隙参考电路接收带隙电压(Vbg)并产生输出电压(VOUT)的第一反相器,以及可操作地耦合到第一反相器以形成锁存器的第二反相器 所述锁存器被配置为保持VOUT的值,所述第二反相器包括天然晶体管,所述天线晶体管具有耦合到VOUT的栅极端子和耦合到Vbg的源极端子。 在其他实施例中,一种方法可以包括在启动电路处接收Vbg并输出被配置为响应于Vbg上升到Vtrig以上或者低于Vtrig而变化的VOUT,其中启动电路的功耗至少部分地基于电压值 施加到启动电路内的原生晶体管的源极端子。

    POWER MONITORING CIRCUITRY
    10.
    发明申请
    POWER MONITORING CIRCUITRY 有权
    电力监控电路

    公开(公告)号:US20140285239A1

    公开(公告)日:2014-09-25

    申请号:US13848348

    申请日:2013-03-21

    IPC分类号: H03K17/693 G01R19/00

    摘要: Power monitoring circuitry. In some embodiments, comparator circuitry may be configured to receive a first voltage value and a second voltage value, and to identify the greater of the first and second voltage values. Selector circuitry coupled to the comparator circuitry may be configured to power one or more components within the comparator circuitry with a supply voltage corresponding to the greater voltage value. In other embodiments, a method may include identifying, via a comparator, the largest among a plurality of voltage values, and powering one or more logic components within the comparator with the identified voltage value.

    摘要翻译: 电源监控电路。 在一些实施例中,比较器电路可以被配置为接收第一电压值和第二电压值,并且识别第一和第二电压值中较大者。 耦合到比较器电路的选择器电路可以被配置为用对应于较大电压值的电源电压为比较器电路内的一个或多个组件供电。 在其他实施例中,方法可以包括通过比较器识别多个电压值中的最大值,以及利用所识别的电压值为比较器内的一个或多个逻辑组件供电。