公开(公告)号：US20110042740A1

公开(公告)日：2011-02-24

申请号：US12858840

申请日：2010-08-18

申请人： Fujio MASUOKA ,  Shintaro ARAI ,  Hiroki NAKAMURA ,  Tomohiko KUDO ,  R. Ramana MURTHY ,  Nansheng SHEN ,  Kavitha Devi BUDDHARAJU ,  Navab SINGH

发明人： Fujio MASUOKA ,  Shintaro ARAI ,  Hiroki NAKAMURA ,  Tomohiko KUDO ,  R. Ramana MURTHY ,  Nansheng SHEN ,  Kavitha Devi BUDDHARAJU ,  Navab SINGH

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/66666 ,  H01L21/76804 ,  H01L21/76816 ,  H01L29/41741 ,  H01L29/42356 ,  H01L29/7827

摘要： A method for producing a semiconductor device includes preparing a structure having a substrate, a planar semiconductor layer and a columnar semiconductor layer, forming a second drain/source region in the upper part of the columnar semiconductor layer, forming a contact stopper film and a contact interlayer film, and forming a contact layer on the second drain/source region. The step for forming the contact layer includes forming a pattern and etching the contact interlayer film to the contact stopper film using the pattern to form a contact hole for the contact layer and removing the contact stopper film remaining at the bottom of the contact hole by etching. The projection of the bottom surface of the contact hole onto the substrate is within the circumference of the projected profile of the contact stopper film formed on the top and side surface of the columnar semiconductor layer onto the substrate.

摘要翻译： 一种制造半导体器件的方法包括制备具有基板，平面半导体层和柱状半导体层的结构，在柱状半导体层的上部形成第二漏极/源极区域，形成接触阻挡膜和触点 并在第二漏极/源极区域上形成接触层。 形成接触层的步骤包括形成图案，并使用图案将接触层间膜蚀刻到接触阻挡膜，以形成用于接触层的接触孔，并通过蚀刻去除残留在接触孔底部的接触阻挡膜 。 接触孔的底面向基板的突出部位于形成在柱状半导体层的顶部和侧面上的接触阻挡膜的突出轮廓的圆周上。

公开(公告)号：US20120049252A1

公开(公告)日：2012-03-01

申请号：US13289742

申请日：2011-11-04

申请人： Fujio MASUOKA ,  Hiroki NAKAMURA ,  Shintaro ARAI ,  Tomohiko KUDO ,  Navab Singh ,  Kavitha Devi Buddharaju ,  Shen Nansheng ,  Rukmani Devi Sayanthan

发明人： Fujio MASUOKA ,  Hiroki NAKAMURA ,  Shintaro ARAI ,  Tomohiko KUDO ,  Navab Singh ,  Kavitha Devi Buddharaju ,  Shen Nansheng ,  Rukmani Devi Sayanthan

IPC分类号： H01L29/78

CPC分类号： H01L29/7827 ,  H01L29/42356 ,  H01L29/42392 ,  H01L29/458 ,  H01L29/66666 ,  H01L29/78642

摘要： A semiconductor device includes a first insulating film formed between a gate electrode and a first flat semiconductor layer, and a sidewall-shaped second insulating film formed to surround an upper sidewall of a first columnar silicon layer while contacting an upper surface of the gate electrode and to surround a sidewall of the gate electrode and the first insulating film. The semiconductor device further includes a metal-semiconductor compound formed on each of an upper surface of a first semiconductor layer of the second conductive type formed in the entirety or the upper portion of the first flat semiconductor layer, and an upper surface of the second semiconductor layer of the second conductive type formed in the upper portion of the first columnar semiconductor layer.

摘要翻译： 半导体器件包括形成在栅极电极和第一平坦半导体层之间的第一绝缘膜，以及侧壁形状的第二绝缘膜，其形成为围绕第一柱状硅层的上侧壁，同时接触栅电极的上表面和 以围绕栅电极和第一绝缘膜的侧壁。 半导体器件还包括形成在第一导电类型的第一半导体层的上表面上的第一半导体层的整体或上部形成的金属半导体化合物和第二半导体的上表面 形成在第一柱状半导体层的上部的第二导电类型的层。

公开(公告)号：US20130059423A1

公开(公告)日：2013-03-07

申请号：US13594022

申请日：2012-08-24

申请人： Tomohiko KUDO ,  Kiyonori OYU

发明人： Tomohiko KUDO ,  Kiyonori OYU

IPC分类号： H01L21/336

CPC分类号： H01L21/2652 ,  H01L27/0207 ,  H01L27/10876 ,  H01L27/10885 ,  H01L29/4236 ,  H01L29/66621

摘要： Provided is a method of manufacturing a semiconductor device, including: forming an active region surrounded by an element isolation region in a substrate; forming a pair of gate trenches in the active region; forming a pair of gate electrodes by embedding a conductor in the gate trenches; forming an implanted layer by implanting ions into a substrate surface between the gate electrodes; and thermally diffusing impurities of the implanted layer at least to a depth of bottom portions of the gate trenches by a transient enhanced diffusion method to form a diffusion layer region between the gate electrodes at least to a depth of bottom portions of the gate electrodes.

摘要翻译： 提供一种制造半导体器件的方法，包括：形成由衬底中的元件隔离区包围的有源区; 在有源区中形成一对栅极沟槽; 通过在栅极沟槽中嵌入导体来形成一对栅电极; 通过将离子注入到栅电极之间的衬底表面中来形成注入层; 以及通过瞬时增强扩散方法将所述注入层的杂质至少热沉扩散到所述栅极沟槽的底部的深度，以在所述栅电极之间至少至所述栅电极的底部的深度形成扩散层区域。