公开(公告)号：US20160358860A1

公开(公告)日：2016-12-08

申请号：US14729298

申请日：2015-06-03

Applicant: GLOBALFOUNDRIES INC.

Inventor： Emre Alptekin ,  Nicolas L. Breil ,  Christian Lavoie ,  Ahmet S. Ozcan ,  Kathryn T. Schonenberg

IPC: H01L23/532 ,  H01L23/528 ,  H01L21/768

CPC classification number: H01L23/53266 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76855 ,  H01L21/76879 ,  H01L21/76883 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238

Abstract: An aspect of the invention includes a method for forming a contact in a dielectric layer over a semiconductor substrate. The method may comprise: forming a contact opening in a dielectric layer over the semiconductor substrate to expose an upper portion of the semiconductor substrate; depositing a first liner layer to conformally coat the contact opening; causing a portion of the first liner layer to diffuse into the upper portion of the semiconductor substrate to form a first intermix region at the upper portion of the semiconductor substrate; depositing a refractory metal layer over the first intermix region; and depositing a metal in the contact opening thereby forming the contact.

Abstract translation: 本发明的一个方面包括在半导体衬底上的电介质层中形成接触的方法。 该方法可以包括：在半导体衬底上的电介质层中形成接触开口以暴露半导体衬底的上部; 沉积第一衬里层以共形地涂覆所述接触开口; 导致第一衬里层的一部分扩散到半导体衬底的上部，以在半导体衬底的上部形成第一混合区; 在第一混合区域上沉积难熔金属层; 以及在接触开口中沉积金属从而形成接触。

公开(公告)号：US20160118298A1

公开(公告)日：2016-04-28

申请号：US14992669

申请日：2016-01-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Emre Alptekin ,  Nicolas L. Breil ,  Christian Lavoie ,  Ahmet S. Ozcan ,  Kathryn T. Schonenberg

IPC: H01L21/768 ,  H01L21/285 ,  H01L29/66

CPC classification number: H01L21/76886 ,  H01L21/28518 ,  H01L21/28568 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76895 ,  H01L21/823871 ,  H01L23/485 ,  H01L23/53209 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L27/092 ,  H01L29/41766 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Contact openings are formed into a dielectric material exposing a surface portion of a semiconductor substrate. An interfacial oxide layer is then formed in each contact opening and on an exposed surface portion of the interfacial oxide layer. A NiPt alloy layer is formed within each opening and on the exposed surface portion of each interfacial oxide layer. An anneal is then performed that forms a contact structure of, from bottom to top, a nickel disilicide alloy body having an inverted pyramidal shape, a Pt rich silicide cap region and an oxygen rich region. A metal contact is then formed within each contact opening and atop the oxygen rich region of each contact structure.

公开(公告)号：US08987135B2

公开(公告)日：2015-03-24

申请号：US13908624

申请日：2013-06-03

Applicant: International Business Machines Corporation ,  GLOBALFOUNDRIES Inc.

Inventor： Christian Lavoie ,  Ahmet S. Ozcan ,  Zhen Zhang ,  Bin Yang

IPC: H01L21/44 ,  H01L21/768 ,  H01L21/285 ,  H01L23/485 ,  H01L29/45 ,  H01L29/66

CPC classification number: H01L21/768 ,  H01L21/28518 ,  H01L23/485 ,  H01L29/456 ,  H01L29/66545 ,  H01L29/66575 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of forming a metal semiconductor alloy that includes forming an intermixed metal semiconductor region to a first depth of a semiconductor substrate without thermal diffusion. The intermixed metal semiconductor region is annealed to form a textured metal semiconductor alloy. A second metal layer is formed on the textured metal semiconductor alloy. The second metal layer on the textured metal semiconductor alloy is then annealed to form a metal semiconductor alloy contact, in which metal elements from the second metal layer are diffused through the textured metal semiconductor alloy to provide a templated metal semiconductor alloy. The templated metal semiconductor alloy includes a grain size that is greater than 2× for the metal semiconductor alloy, which has a thickness ranging from 15 nm to 50 nm.

Abstract translation: 一种形成金属半导体合金的方法，其包括在半导体衬底的第一深度上形成混合金属半导体区域而没有热扩散。 将混合后的金属半导体区域退火以形成织构化的金属半导体合金。 在纹理金属半导体合金上形成第二金属层。 纹理金属半导体合金上的第二金属层然后退火以形成金属半导体合金接触，其中来自第二金属层的金属元素通过织构化金属半导体合金扩散以提供模板化的金属半导体合金。 模板化金属半导体合金的厚度范围为15nm〜50nm的金属半导体合金的晶粒尺寸大于2×。

公开(公告)号：US10707167B2

公开(公告)日：2020-07-07

申请号：US15826939

申请日：2017-11-30

Applicant: GLOBALFOUNDRIES INC.

Inventor： Emre Alptekin ,  Nicolas L. Breil ,  Christian Lavoie ,  Ahmet S. Ozcan ,  Kathryn T. Schonenberg

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/485 ,  H01L21/285

Abstract: An aspect of the invention includes a method for forming a contact in a dielectric layer over a semiconductor substrate. The method may comprise: forming a contact opening in a dielectric layer over the semiconductor substrate to expose an upper portion of the semiconductor substrate; depositing a first liner layer to conformally coat the contact opening; causing a portion of the first liner layer to diffuse into the upper portion of the semiconductor substrate to form a first intermix region at the upper portion of the semiconductor substrate; depositing a refractory metal layer over the first intermix region; and depositing a metal in the contact opening thereby forming the contact.

公开(公告)号：US09379012B2

公开(公告)日：2016-06-28

申请号：US14992669

申请日：2016-01-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Emre Alptekin ,  Nicolas L. Breil ,  Christian Lavoie ,  Ahmet S. Ozcan ,  Kathryn T. Schonenberg

IPC: H01L29/78 ,  H01L23/535 ,  H01L29/423 ,  H01L29/417 ,  H01L21/285 ,  H01L27/092 ,  H01L21/768 ,  H01L29/66

CPC classification number: H01L21/76886 ,  H01L21/28518 ,  H01L21/28568 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76895 ,  H01L21/823871 ,  H01L23/485 ,  H01L23/53209 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L27/092 ,  H01L29/41766 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Contact openings are formed into a dielectric material exposing a surface portion of a semiconductor substrate. An interfacial oxide layer is then formed in each contact opening and on an exposed surface portion of the interfacial oxide layer. A NiPt alloy layer is formed within each opening and on the exposed surface portion of each interfacial oxide layer. An anneal is then performed that forms a contact structure of, from bottom to top, a nickel disilicide alloy body having an inverted pyramidal shape, a Pt rich silicide cap region and an oxygen rich region. A metal contact is then formed within each contact opening and atop the oxygen rich region of each contact structure.

公开(公告)号：US09373696B2

公开(公告)日：2016-06-21

申请号：US14617314

申请日：2015-02-09

Applicant: GLOBALFOUNDRIES INC.

Inventor： Christian Lavoie ,  Dong-Ick Lee ,  Ahmet S. Ozcan ,  Zhen Zhang

IPC: H01L21/336 ,  H01L29/66 ,  H01L21/285 ,  H01L21/02 ,  H01L21/24 ,  H01L21/3213 ,  H01L21/324 ,  H01L29/161

CPC classification number: H01L29/665 ,  H01L21/02381 ,  H01L21/02631 ,  H01L21/244 ,  H01L21/28518 ,  H01L21/32133 ,  H01L21/324 ,  H01L29/161

Abstract: In one aspect, a method of fabricating a metal silicide includes the following steps. A semiconductor material selected from the group consisting of silicon and silicon germanium is provided. A metal(s) is deposited on the semiconductor material. A first anneal is performed at a temperature and for a duration sufficient to react the metal(s) with the semiconductor material to form an amorphous layer including an alloy formed from the metal(s) and the semiconductor material, wherein the temperature at which the first anneal is performed is below a temperature at which a crystalline phase of the alloy is formed. An etch is used to selectively remove unreacted portions of the metal(s). A second anneal is performed at a temperature and for a duration sufficient to crystallize the alloy thus forming the metal silicide. A device contact and a method of fabricating a FET device are also provided.

公开(公告)号：US20180090447A1

公开(公告)日：2018-03-29

申请号：US15826939

申请日：2017-11-30

Applicant: GLOBALFOUNDRIES INC.

Inventor： Emre Alptekin ,  Nicolas L. Breil ,  Christian Lavoie ,  Ahmet S. Ozcan ,  Kathryn T. Schonenberg

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/485 ,  H01L21/285

CPC classification number: H01L23/53266 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76855 ,  H01L21/76879 ,  H01L21/76883 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238

Abstract: An aspect of the invention includes a method for forming a contact in a dielectric layer over a semiconductor substrate. The method may comprise: forming a contact opening in a dielectric layer over the semiconductor substrate to expose an upper portion of the semiconductor substrate; depositing a first liner layer to conformally coat the contact opening; causing a portion of the first liner layer to diffuse into the upper portion of the semiconductor substrate to form a first intermix region at the upper portion of the semiconductor substrate; depositing a refractory metal layer over the first intermix region; and depositing a metal in the contact opening thereby forming the contact.

公开(公告)号：US09293554B2

公开(公告)日：2016-03-22

申请号：US14797982

申请日：2015-07-13

Applicant: GLOBALFOUNDRIES INC.

Inventor： Nicolas Breil ,  Christian Lavoie ,  Ahmet S. Ozcan ,  Kathryn T. Schonenberg ,  Jian Yu

IPC: H01L21/8238 ,  H01L29/45 ,  H01L29/66 ,  H01L21/285

CPC classification number: H01L29/456 ,  H01L21/28052 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/28568 ,  H01L21/28575 ,  H01L21/76843 ,  H01L21/76855 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/78

Abstract: Metal semiconductor alloy contacts are provided on each of a source region and a drain region which are present in a semiconductor substrate. A transition metal is then deposited on each of the metal semiconductor alloy contacts, and during the deposition of the transition metal, the deposited transition metal reacts preferably, but not necessarily always, in-situ with a portion of each the metal semiconductor alloy contacts forming a transition metal-metal semiconductor alloy liner atop each metal semiconductor alloy contact. Each transition metal-metal semiconductor alloy liner that is provided has outer edges that are vertically coincident with outer edges of each metal semiconductor alloy contact. The transition metal-metal semiconductor alloy liner is more etch resistant as compared to the underlying metal semiconductor alloy. As such, the transition metal-metal semiconductor alloy liner can serve as an effective etch stop layer during any subsequently performed etch process.

公开(公告)号：US20130267090A1

公开(公告)日：2013-10-10

申请号：US13908624

申请日：2013-06-03

Applicant: GLOBALFOUNDRIES Inc. ,  International Business Machines Corporation

Inventor： Christian Lavoie ,  Ahmet S. Ozcan ,  Zhen Zhang ,  Bin Yang

IPC: H01L21/768

CPC classification number: H01L21/768 ,  H01L21/28518 ,  H01L23/485 ,  H01L29/456 ,  H01L29/66545 ,  H01L29/66575 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of forming a metal semiconductor alloy that includes forming an intermixed metal semiconductor region to a first depth of a semiconductor substrate without thermal diffusion. The intermixed metal semiconductor region is annealed to form a textured metal semiconductor alloy. A second metal layer is formed on the textured metal semiconductor alloy. The second metal layer on the textured metal semiconductor alloy is then annealed to form a metal semiconductor alloy contact, in which metal elements from the second metal layer are diffused through the textured metal semiconductor alloy to provide a templated metal semiconductor alloy. The templated metal semiconductor alloy includes a grain size that is greater than 2× for the metal semiconductor alloy, which has a thickness ranging from 15 nm to 50 nm.

Abstract translation: 一种形成金属半导体合金的方法，其包括在半导体衬底的第一深度上形成混合金属半导体区域而没有热扩散。 将混合后的金属半导体区域退火以形成织构化的金属半导体合金。 在纹理金属半导体合金上形成第二金属层。 纹理金属半导体合金上的第二金属层然后退火以形成金属半导体合金接触，其中来自第二金属层的金属元素通过织构化金属半导体合金扩散以提供模板化的金属半导体合金。 模板化金属半导体合金的厚度范围为15nm〜50nm的金属半导体合金的晶粒尺寸大于2×。

公开(公告)号：US09865546B2

公开(公告)日：2018-01-09

申请号：US14729298

申请日：2015-06-03

Applicant: GLOBALFOUNDRIES INC.

Inventor： Emre Alptekin ,  Nicolas L. Breil ,  Christian Lavoie ,  Ahmet S. Ozcan ,  Kathryn T. Schonenberg

IPC: H01L23/532 ,  H01L23/528 ,  H01L21/768 ,  H01L23/485

CPC classification number: H01L23/53266 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76855 ,  H01L21/76879 ,  H01L21/76883 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238

Abstract: An aspect of the invention includes a method for forming a contact in a dielectric layer over a semiconductor substrate. The method may comprise: forming a contact opening in a dielectric layer over the semiconductor substrate to expose an upper portion of the semiconductor substrate; depositing a first liner layer to conformally coat the contact opening; causing a portion of the first liner layer to diffuse into the upper portion of the semiconductor substrate to form a first intermix region at the upper portion of the semiconductor substrate; depositing a refractory metal layer over the first intermix region; and depositing a metal in the contact opening thereby forming the contact.