公开(公告)号：US10707167B2

公开(公告)日：2020-07-07

申请号：US15826939

申请日：2017-11-30

Applicant: GLOBALFOUNDRIES INC.

Inventor： Emre Alptekin ,  Nicolas L. Breil ,  Christian Lavoie ,  Ahmet S. Ozcan ,  Kathryn T. Schonenberg

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/485 ,  H01L21/285

Abstract: An aspect of the invention includes a method for forming a contact in a dielectric layer over a semiconductor substrate. The method may comprise: forming a contact opening in a dielectric layer over the semiconductor substrate to expose an upper portion of the semiconductor substrate; depositing a first liner layer to conformally coat the contact opening; causing a portion of the first liner layer to diffuse into the upper portion of the semiconductor substrate to form a first intermix region at the upper portion of the semiconductor substrate; depositing a refractory metal layer over the first intermix region; and depositing a metal in the contact opening thereby forming the contact.

公开(公告)号：US09859403B1

公开(公告)日：2018-01-02

申请号：US15174147

申请日：2016-07-22

Applicant: GLOBALFOUNDRIES INC.

Inventor： Nicolas L. Breil ,  Neal A. Makela ,  Praneet Adusumilli ,  Domingo A. Ferrer

IPC: H01L29/417 ,  H01L29/66 ,  H01L29/04 ,  H01L29/08 ,  H01L21/285 ,  H01L29/78

CPC classification number: H01L29/66795 ,  H01L21/2855 ,  H01L29/045 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/785 ,  H01L2029/7858

Abstract: During a physical vapor deposition (PVD) process, the ion energy of a depositing species is controlled. By varying the ion energy throughout the process, the degree of conformality of the deposited layer over three-dimensional structures, including the extent to which the deposited layer merges between adjacent structures can be controlled.

公开(公告)号：US09431534B2

公开(公告)日：2016-08-30

申请号：US14557541

申请日：2014-12-02

Applicant: GLOBALFOUNDRIES INC.

Inventor： Nicolas L. Breil ,  Oleg Gluschenkov

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/265 ,  H01L21/3115 ,  H01L21/311 ,  H01L21/02 ,  H01L29/06 ,  H01L21/84

CPC classification number: H01L21/845 ,  H01L21/26586 ,  H01L21/31111 ,  H01L21/31155 ,  H01L29/66795 ,  H01L29/7845 ,  H01L29/7848 ,  H01L29/785

Abstract: A device includes a field effect transistor on an insulating film. A first fin extends vertically from a top side of a horizontal surface of a semiconductor substrate. An epitaxial cap rests on the first fin, with a left vertex on a left side of the epitaxial cap at a first horizontal distance from a reference line that vertically bisects the first fin, and a right vertex on the right side of the epitaxial cap at a second horizontal distance from the reference line, the first horizontal distance being at least twenty percent greater than the second horizontal distance; and a top vertex is at a third horizontal distance to the left of the reference line.

Abstract translation: 一种器件包括在绝缘膜上的场效应晶体管。 第一鳍从半导体衬底的水平表面的顶侧垂直延伸。 外延帽位于第一鳍片上，在外延帽的左侧的左顶点与从垂直方向平分第一鳍片的基准线和第二鳍片的右侧的右顶点处的第一水平距离处 距离参考线的第二水平距离，第一水平距离比第二水平距离大至少20％; 并且顶部顶点距离参考线左侧的第三水平距离。

公开(公告)号：US09379012B2

公开(公告)日：2016-06-28

申请号：US14992669

申请日：2016-01-11

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Emre Alptekin ,  Nicolas L. Breil ,  Christian Lavoie ,  Ahmet S. Ozcan ,  Kathryn T. Schonenberg

IPC: H01L29/78 ,  H01L23/535 ,  H01L29/423 ,  H01L29/417 ,  H01L21/285 ,  H01L27/092 ,  H01L21/768 ,  H01L29/66

CPC classification number: H01L21/76886 ,  H01L21/28518 ,  H01L21/28568 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76895 ,  H01L21/823871 ,  H01L23/485 ,  H01L23/53209 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L27/092 ,  H01L29/41766 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Contact openings are formed into a dielectric material exposing a surface portion of a semiconductor substrate. An interfacial oxide layer is then formed in each contact opening and on an exposed surface portion of the interfacial oxide layer. A NiPt alloy layer is formed within each opening and on the exposed surface portion of each interfacial oxide layer. An anneal is then performed that forms a contact structure of, from bottom to top, a nickel disilicide alloy body having an inverted pyramidal shape, a Pt rich silicide cap region and an oxygen rich region. A metal contact is then formed within each contact opening and atop the oxygen rich region of each contact structure.

公开(公告)号：US09905692B2

公开(公告)日：2018-02-27

申请号：US15160099

申请日：2016-05-20

Applicant: GLOBALFOUNDRIES INC.

Inventor： Alexander Reznicek ,  Shogo Mochizuki ,  Veeraraghavan S. Basker ,  Nicolas L. Breil ,  Oleg Gluschenkov

IPC: H01L29/76 ,  H01L29/78 ,  H01L29/165 ,  H01L29/66

CPC classification number: H01L29/7848 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/785

Abstract: Fabrication method for a semiconductor device and structure are provided, which includes: providing an isolation layer at least partially disposed adjacent to at least one sidewall of a fin structure extended above a substrate structure, the fin structure including a channel region; recessing an exposed portion of the fin structure to define a residual stress to be induced into the channel region of the fin structure, wherein upper surfaces of a recessed fin portion and the isolation layer are coplanar with each other; and epitaxially growing a semiconductor material from the recessed exposed portion of the fin structure to form at least one of a source region and a drain region of the semiconductor device.

公开(公告)号：US09379207B2

公开(公告)日：2016-06-28

申请号：US14302585

申请日：2014-06-12

Applicant: GLOBALFOUNDRIES INC.

Inventor： Nicolas L. Breil

IPC: H01L29/66 ,  H01L21/3065 ,  H01L29/45 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/8238 ,  H01L29/78 ,  H01L21/268 ,  H01L21/28 ,  H01L29/417 ,  H01L21/324

CPC classification number: H01L29/665 ,  H01L21/268 ,  H01L21/28052 ,  H01L21/28518 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/32051 ,  H01L21/321 ,  H01L21/324 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/823814 ,  H01L29/41725 ,  H01L29/456 ,  H01L29/66515 ,  H01L29/7833

Abstract: A method of forming a stable nickel silicide layer is provided. The method may include forming a nickel silicide layer on a substrate. A fluorine-rich nickel layer is formed over the nickel silicide layer. The fluorine-rich nickel layer is subjected to a process that drives the fluorine in the fluorine-rich nickel layer into the nickel silicide layer thereunder.

Abstract translation: 提供了形成稳定的硅化镍层的方法。 该方法可以包括在衬底上形成硅化镍层。 在硅化镍层上方形成富含氟的镍层。 对富氟镍层进行将富氟镍层中的氟驱动到其内的硅化镍层的工序。

公开(公告)号：US20180026118A1

公开(公告)日：2018-01-25

申请号：US15174147

申请日：2016-07-22

Applicant: GLOBALFOUNDRIES INC.

Inventor： Nicolas L. Breil ,  Neal A. Makela ,  Praneet Adusumilli ,  Domingo A. Ferrer

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/417 ,  H01L21/285 ,  H01L29/04 ,  H01L29/08

CPC classification number: H01L29/66795 ,  H01L21/2855 ,  H01L29/045 ,  H01L29/0847 ,  H01L29/41791 ,  H01L29/785 ,  H01L2029/7858

Abstract: During a physical vapor deposition (PVD) process, the ion energy of a depositing species is controlled. By varying the ion energy throughout the process, the degree of conformality of the deposited layer over three-dimensional structures, including the extent to which the deposited layer merges between adjacent structures can be controlled.

公开(公告)号：US20170301697A1

公开(公告)日：2017-10-19

申请号：US15098722

申请日：2016-04-14

Applicant: GLOBALFOUNDRIES INC.

Inventor： Alexander Reznicek ,  Veeraraghavan S. Basker ,  Shogo Mochizuki ,  Nicolas L. Breil ,  Oleg Gluschenkov

IPC: H01L27/12 ,  H01L21/84 ,  H01L21/324 ,  H01L21/02 ,  H01L29/66 ,  H01L21/3115

CPC classification number: H01L27/1211 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02623 ,  H01L21/31155 ,  H01L21/324 ,  H01L21/823431 ,  H01L21/845 ,  H01L27/01 ,  H01L27/0886 ,  H01L29/161 ,  H01L29/6653 ,  H01L29/7848

Abstract: Relaxed silicon germanium fins are formed on a bulk silicon substrate through the lateral recrystallization of molten silicon germanium having high germanium content. Following formation of the silicon germanium fins, the silicon is selectively recessed.The resulting trenches are filled with electrically insulating material and then recessed down to the bottoms of the fins.

公开(公告)号：US20160358860A1

公开(公告)日：2016-12-08

申请号：US14729298

申请日：2015-06-03

Applicant: GLOBALFOUNDRIES INC.

Inventor： Emre Alptekin ,  Nicolas L. Breil ,  Christian Lavoie ,  Ahmet S. Ozcan ,  Kathryn T. Schonenberg

IPC: H01L23/532 ,  H01L23/528 ,  H01L21/768

CPC classification number: H01L23/53266 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76855 ,  H01L21/76879 ,  H01L21/76883 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238

Abstract: An aspect of the invention includes a method for forming a contact in a dielectric layer over a semiconductor substrate. The method may comprise: forming a contact opening in a dielectric layer over the semiconductor substrate to expose an upper portion of the semiconductor substrate; depositing a first liner layer to conformally coat the contact opening; causing a portion of the first liner layer to diffuse into the upper portion of the semiconductor substrate to form a first intermix region at the upper portion of the semiconductor substrate; depositing a refractory metal layer over the first intermix region; and depositing a metal in the contact opening thereby forming the contact.

Abstract translation: 本发明的一个方面包括在半导体衬底上的电介质层中形成接触的方法。 该方法可以包括：在半导体衬底上的电介质层中形成接触开口以暴露半导体衬底的上部; 沉积第一衬里层以共形地涂覆所述接触开口; 导致第一衬里层的一部分扩散到半导体衬底的上部，以在半导体衬底的上部形成第一混合区; 在第一混合区域上沉积难熔金属层; 以及在接触开口中沉积金属从而形成接触。

公开(公告)号：US20160240438A1

公开(公告)日：2016-08-18

申请号：US14622997

申请日：2015-02-16

Applicant: GLOBALFOUNDRIES INC.

Inventor： Nicolas L. Breil ,  Domingo A. Ferrer ,  Keith Kwong Hon Wong

IPC: H01L21/768 ,  H01L27/112 ,  H01L23/525

CPC classification number: H01L27/11206 ,  H01L21/76886 ,  H01L23/5228 ,  H01L23/5256 ,  H01L23/53261

Abstract: A method for forming a precision resistor or an e-fuse structure where tungsten silicon is used. The tungsten silicon layer is modified by changing the crystalline structure to a tetragonal tungsten silicon layer.

Abstract translation: 用于形成使用钨硅的精密电阻器或e熔丝结构的方法。 通过将晶体结构改变为四方钨硅层来改变钨硅层。