公开(公告)号：US20170330790A1

公开(公告)日：2017-11-16

申请号：US15152797

申请日：2016-05-12

Applicant: GLOBALFOUNDRIES INC.

Inventor： Zhong-Xiang He ,  Mark D. Jaffe ,  Randy L. Wolf ,  Alvin J. Joseph ,  Brett T. Cucci ,  Anthony K. Stamper

IPC: H01L21/768 ,  H01L21/84 ,  H01L21/3213 ,  H01L21/311 ,  H01L23/66 ,  H01L21/02

CPC classification number: H01L21/7682 ,  H01L21/02271 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76805 ,  H01L21/76829 ,  H01L21/76895 ,  H01L21/84 ,  H01L23/66 ,  H01L27/1248 ,  H01L29/78654

Abstract: A semiconductor device may include a transistor gate in a device layer; an interconnect layer over the device layer; and an air gap extending through the interconnect layer to contact an upper surface of the transistor gate. The air gap provides a mechanism to reduce both on-resistance and off-capacitance for applications using SOI substrates such as radio frequency switches.

公开(公告)号：US10157777B2

公开(公告)日：2018-12-18

申请号：US15152797

申请日：2016-05-12

Applicant: GLOBALFOUNDRIES INC.

Inventor： Zhong-Xiang He ,  Mark D. Jaffe ,  Randy L. Wolf ,  Alvin J. Joseph ,  Brett T. Cucci ,  Anthony K. Stamper

IPC: H01L29/00 ,  H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/84 ,  H01L23/66 ,  H01L29/786

Abstract: A semiconductor device may include a transistor gate in a device layer; an interconnect layer over the device layer; and an air gap extending through the interconnect layer to contact an upper surface of the transistor gate. The air gap provides a mechanism to reduce both on-resistance and off-capacitance for applications using SOI substrates such as radio frequency switches.

公开(公告)号：US10056306B2

公开(公告)日：2018-08-21

申请号：US15015478

申请日：2016-02-04

Applicant: GLOBALFOUNDRIES INC.

Inventor： Edward C. Cooney, III ,  Gary L. Milo ,  Thomas W. Weeks ,  Patrick S. Spinney ,  John C. Hall ,  Brian P. Conchieri ,  Brett T. Cucci ,  Thomas C. Lee

IPC: H01L21/66 ,  H01L23/544 ,  G01R31/28

CPC classification number: H01L22/32 ,  G01R31/2853 ,  G01R31/2884 ,  H01L22/34 ,  H01L23/544

Abstract: Aspects of the present disclosure include a test structure that includes two or more devices. Each device includes a wire disposed within a dielectric and a first via disposed over the wire and in electrical contact with the wire. Each device includes a test pad electrically connected to the first via and a polysilicon resistor electrically connected to the wire. Each of the polysilicon resistors of the two or more devices are electrically tied together. A method for forming the interconnect structure to be used for testing is also provided.

公开(公告)号：US20170330832A1

公开(公告)日：2017-11-16

申请号：US15152794

申请日：2016-05-12

Applicant: GLOBALFOUNDRIES INC.

Inventor： Zhong-Xiang He ,  Mark D. Jaffe ,  Randy L. Wolf ,  Alvin J. Joseph ,  Brett T. Cucci ,  Anthony K. Stamper

IPC: H01L23/522 ,  H01L23/66 ,  H01L23/528 ,  H01L27/12

CPC classification number: H01L23/5222 ,  H01L21/7682 ,  H01L23/4821 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53295 ,  H01L27/1203

Abstract: A semiconductor device may include a transistor gate in a device layer; an interconnect layer over the device layer; and an air gap extending through the interconnect layer to contact an upper surface of the transistor gate. The air gap provides a mechanism to reduce both on-resistance and off-capacitance for applications using SOI substrates such as radio frequency switches.

公开(公告)号：US10211146B2

公开(公告)日：2019-02-19

申请号：US15152794

申请日：2016-05-12

Applicant: GLOBALFOUNDRIES INC.

Inventor： Zhong-Xiang He ,  Mark D. Jaffe ,  Randy L. Wolf ,  Alvin J. Joseph ,  Brett T. Cucci ,  Anthony K. Stamper

IPC: H01L23/522 ,  H01L27/12 ,  H01L23/482 ,  H01L21/768 ,  H01L23/532

Abstract: A semiconductor device may include a transistor gate in a device layer; an interconnect layer over the device layer; and an air gap extending through the interconnect layer to contact an upper surface of the transistor gate. The air gap provides a mechanism to reduce both on-resistance and off-capacitance for applications using SOI substrates such as radio frequency switches.

公开(公告)号：US20170229358A1

公开(公告)日：2017-08-10

申请号：US15015478

申请日：2016-02-04

Applicant: GLOBALFOUNDRIES INC.

Inventor： Edward C. Cooney, III ,  Gary L. Milo ,  Thomas W. Weeks ,  Patrick S. Spinney ,  John C. Hall ,  Brian P. Conchieri ,  Brett T. Cucci ,  Thomas C. Lee

IPC: H01L21/66 ,  G01R31/28 ,  H01L23/544

CPC classification number: H01L22/32 ,  G01R31/2853 ,  G01R31/2884 ,  H01L22/34 ,  H01L23/544

Abstract: Aspects of the present disclosure include a test structure that includes two or more devices. Each device includes a wire disposed within a dielectric and a first via disposed over the wire and in electrical contact with the wire. Each device includes a test pad electrically connected to the first via and a polysilicon resistor electrically connected to the wire. Each of the polysilicon resistors of the two or more devices are electrically tied together. A method for forming the interconnect structure to be used for testing is also provided.

公开(公告)号：US09715064B1

公开(公告)日：2017-07-25

申请号：US15263817

申请日：2016-09-13

Applicant: GLOBALFOUNDRIES INC.

Inventor： Jeffrey P. Gambino ,  Robert K. Leidy ,  John J. Ellis-Monaghan ,  Brett T. Cucci ,  Jeffrey C. Maling ,  Jessie C. Rosenberg

IPC: G02B6/124 ,  G02B6/34 ,  G02B6/12

CPC classification number: G02B6/124 ,  G02B6/34 ,  G02B2006/12107

Abstract: Disclosed are multi-chip modules (MCMs) that allow for chip-to-chip transmission of light signals. The MCMs can incorporate at least two components, which are attached (e.g., by interconnects). For example, in one MCM disclosed herein, the two components can be an integrated circuit chip and an interposer to which the integrated circuit chip and one or more additional integrated circuit chips are attached by interconnects. In another MCM disclosed herein, the two components can be two integrated circuit chips that are stacked and attached to each other by interconnects. In either case, the two components can each have a waveguide and a grating coupler coupled to one end of the waveguide. The grating couplers on the different components can be approximately vertically aligned, thereby allowing light signals to be transmitted between the waveguides on those different components. Also, disclosed herein are methods of forming such MCMs.