Geometry vectorization for mask process correction

    公开(公告)号:US10386726B2

    公开(公告)日:2019-08-20

    申请号:US15720182

    申请日:2017-09-29

    Abstract: Various aspects include vectorization approaches for model-based mask proximity correction (MPC). In some cases, a computer-implemented method includes: assigning a set of vectors to geometry data describing at least one mask for forming an integrated circuit (IC); adjusting a statistical predictive model of the at least one mask based upon the set of vectors and the geometry data; predicting an adjustment to the at least one mask with the statistical predictive model; and adjusting instructions for forming the at least one mask in response to a predicted mask result of the statistical predictive model deviating from a target mask result for the at least one mask.

    SYSTEM AND METHOD FOR ANALYZING PRINTED MASKS FOR LITHOGRAPHY BASED ON REPRESENTATIVE CONTOURS

    公开(公告)号:US20190219933A1

    公开(公告)日:2019-07-18

    申请号:US15874039

    申请日:2018-01-18

    Abstract: Embodiments of a method include: converting at least one image of a printed mask to a plurality of representative contours, each corresponding to mask patterns in the printed mask; determining whether the printed mask includes a printing defect based on whether the plurality of representative contours violates a set of contour tolerances for the printed mask; in response to at least one of plurality of representative contours violating at least one of the set of contour tolerances: identifying a location where a representative contour violates the at least one of the set of contour tolerances, and generating an instruction to adjust a layout for the printed mask, based on the violating of the at least one of the set of contour tolerances; and in response to none of the plurality of representative contours violating the set of contour tolerances, flagging a layout for the printed mask as compliant.

    PREDICTION OF PROCESS-SENSITIVE GEOMETRIES WITH MACHINE LEARNING

    公开(公告)号:US20180322234A1

    公开(公告)日:2018-11-08

    申请号:US15588984

    申请日:2017-05-08

    Abstract: Methods according to the disclosure include: predicting process-sensitive geometries (PSGs) in a proposed IC layout based on violations of a set of processing constraints for the proposed IC layout, the set of processing constraints being calculated with a predictive model based on a training data repository having a plurality of optical rule check (ORC) simulations for different IC layouts; identifying actual PSGs in a circuit manufactured using the proposed IC layout; determining whether the predicted PSGs correspond to the actual PSGs in the manufactured circuit as being correct; in response to the predicting being incorrect: adjusting the predictive model based on the actual PSGs, wherein the adjusting includes submitting additional ORC data to the training data repository; and flagging the proposed IC layout as incorrectly predicted; and in response to the predicting being correct, flagging the proposed IC layout as correctly predicted.

    GEOMETRY VECTORIZATION FOR MASK PROCESS CORRECTION

    公开(公告)号:US20190101834A1

    公开(公告)日:2019-04-04

    申请号:US15720182

    申请日:2017-09-29

    CPC classification number: G03F7/70441 G03F1/36 G03F7/704 G05B13/042 G05B13/048

    Abstract: Various aspects include vectorization approaches for model-based mask proximity correction (MPC). In some cases, a computer-implemented method includes: assigning a set of vectors to geometry data describing at least one mask for forming an integrated circuit (IC); adjusting a statistical predictive model of the at least one mask based upon the set of vectors and the geometry data; predicting an adjustment to the at least one mask with the statistical predictive model; and adjusting instructions for forming the at least one mask in response to a predicted mask result of the statistical predictive model deviating from a target mask result for the at least one mask.

    System and method for analyzing printed masks for lithography based on representative contours

    公开(公告)号:US10564554B2

    公开(公告)日:2020-02-18

    申请号:US15874039

    申请日:2018-01-18

    Abstract: Embodiments of a method include: converting at least one image of a printed mask to a plurality of representative contours, each corresponding to mask patterns in the printed mask; determining whether the printed mask includes a printing defect based on whether the plurality of representative contours violates a set of contour tolerances for the printed mask; in response to at least one of plurality of representative contours violating at least one of the set of contour tolerances: identifying a location where a representative contour violates the at least one of the set of contour tolerances, and generating an instruction to adjust a layout for the printed mask, based on the violating of the at least one of the set of contour tolerances; and in response to none of the plurality of representative contours violating the set of contour tolerances, flagging a layout for the printed mask as compliant.

    Prediction of process-sensitive geometries with machine learning

    公开(公告)号:US10402524B2

    公开(公告)日:2019-09-03

    申请号:US15588984

    申请日:2017-05-08

    Abstract: Methods according to the disclosure include: predicting process-sensitive geometries (PSGs) in a proposed IC layout based on violations of a set of processing constraints for the proposed IC layout, the set of processing constraints being calculated with a predictive model based on a training data repository having a plurality of optical rule check (ORC) simulations for different IC layouts; identifying actual PSGs in a circuit manufactured using the proposed IC layout; determining whether the predicted PSGs correspond to the actual PSGs in the manufactured circuit as being correct; in response to the predicting being incorrect: adjusting the predictive model based on the actual PSGs, wherein the adjusting includes submitting additional ORC data to the training data repository; and flagging the proposed IC layout as incorrectly predicted; and in response to the predicting being correct, flagging the proposed IC layout as correctly predicted.

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