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1.发明申请METHODS OF FORMING A SEMICONDUCTOR DEVICE WITH A PROTECTED GATE CAP LAYER AND THE RESULTING DEVICE 有权形成具有保护盖板层和结构设备的半导体器件的方法公开(公告)号：US20150041869A1
公开(公告)日：2015-02-12
申请号：US14526126
申请日：2014-10-28
Inventor： Daniel Pham , Xiuyu Cai , Balasubramanian Pranatharthiharan , Pranita Kulkarni
IPC: H01L29/423 , H01L29/51
CPC classification number: H01L29/42364 , H01L21/28247 , H01L29/517 , H01L29/66545 , H01L29/66795 , H01L29/78
Abstract: One method disclosed herein includes forming first and second gate cap protection layers that encapsulate and protect a gate cap layer. A novel transistor device disclosed herein includes a gate structure positioned above a semiconductor substrate, a spacer structure positioned adjacent the gate structure, a layer of insulating material positioned above the substrate and around the spacer structure, a gate cap layer positioned above the gate structure and the spacer structure, and a gate cap protection material that encapsulates the gate cap layer, wherein portions of the gate cap protection material are positioned between the gate cap layer and the gate structure, the spacer structure and the layer of insulating material.
Abstract translation: 本文公开的一种方法包括形成封装并保护栅极盖层的第一和第二栅极盖保护层。 本文公开的新型晶体管器件包括位于半导体衬底上方的栅极结构，邻近栅极结构定位的间隔结构，位于衬底上方并围绕间隔结构的绝缘材料层，位于栅极结构之上的栅极盖层， 所述间隔结构以及封装所述栅极盖层的栅极帽保护材料，其中所述栅极盖保护材料的部分位于所述栅极盖层和所述栅极结构之间，所述间隔物结构和所述绝缘材料层。
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2.发明授权Methods of forming a semiconductor device with a protected gate cap layer and the resulting device 有权用保护的栅极盖层形成半导体器件的方法和所得到的器件公开(公告)号：US08906754B2
公开(公告)日：2014-12-09
申请号：US13839802
申请日：2013-03-15
Inventor： Daniel Pham , Xiuyu Cai , Balasubramanian Pranatharthiharan , Pranita Kulkarni
CPC classification number: H01L29/42364 , H01L21/28247 , H01L29/517 , H01L29/66545 , H01L29/66795 , H01L29/78
Abstract: One method disclosed herein includes forming first and second gate cap protection layers that encapsulate and protect a gate cap layer. A novel transistor device disclosed herein includes a gate structure positioned above a semiconductor substrate, a spacer structure positioned adjacent the gate structure, a layer of insulating material positioned above the substrate and around the spacer structure, a gate cap layer positioned above the gate structure and the spacer structure, and a gate cap protection material that encapsulates the gate cap layer, wherein portions of the gate cap protection material are positioned between the gate cap layer and the gate structure, the spacer structure and the layer of insulating material.
Abstract translation: 本文公开的一种方法包括形成封装并保护栅极盖层的第一和第二栅极盖保护层。 本文公开的新型晶体管器件包括位于半导体衬底上方的栅极结构，邻近栅极结构定位的间隔结构，位于衬底上方并围绕间隔结构的绝缘材料层，位于栅极结构之上的栅极盖层， 所述间隔结构以及封装所述栅极盖层的栅极帽保护材料，其中所述栅极盖保护材料的部分位于所述栅极盖层和所述栅极结构之间，所述间隔物结构和所述绝缘材料层。
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Patent Agency Ranking
3.发明授权Methods of forming a semiconductor device with a protected gate cap layer and the resulting device 有权用保护的栅极盖层形成半导体器件的方法和所得到的器件公开(公告)号：US08871582B2
公开(公告)日：2014-10-28
申请号：US13839626
申请日：2013-03-15
Inventor： Daniel Pham , Xiuyu Cai , Balasubramanian Pranatharthiharan , Pranita Kulkarni
IPC: H01L29/78 , H01L21/28 , H01L29/423
CPC classification number: H01L29/4232 , H01L21/28247 , H01L29/66545 , H01L29/78
Abstract: One method includes forming a recessed gate/spacer structure that partially defines a spacer/gate cap recess, forming a gate cap layer in the spacer/gate cap recess, forming a gate cap protection layer on an upper surface of the gate cap layer, and removing portions of the gate cap protection layer, leaving a portion of the gate cap protection layer positioned on the upper surface of the gate cap layer. A device disclosed herein includes a gate/spacer structure positioned in a layer of insulating material, a gate cap layer positioned on the gate/spacer structure, wherein sidewalls of the gate cap layer contact the layer of insulating material, and a gate cap protection layer positioned on an upper surface of the gate cap layer, wherein the sidewalls of the gate cap protection layer also contact the layer of insulating material.
Abstract translation: 一种方法包括形成凹入的栅极/间隔结构，其部分地限定间隔物/栅极盖凹部，在间隔物/栅极盖凹部中形成栅极盖层，在栅极盖层的上表面上形成栅极盖保护层，以及 去除栅极帽保护层的部分，留下栅极盖保护层的一部分位于栅极盖层的上表面上。 本文公开的装置包括定位在绝缘材料层中的栅极/间隔结构，位于栅极/间隔物结构上的栅极盖层，其中栅极盖层的侧壁接触绝缘材料层，栅极盖保护层 定位在栅极盖层的上表面上，其中栅极盖保护层的侧壁也接触绝缘材料层。
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4.发明申请METHODS OF FORMING A SEMICONDUCTOR DEVICE WITH A PROTECTED GATE CAP LAYER AND THE RESULTING DEVICE 有权形成具有保护盖板层和结构设备的半导体器件的方法公开(公告)号：US20140264487A1
公开(公告)日：2014-09-18
申请号：US13839802
申请日：2013-03-15
Inventor： Daniel Pham , Xiuyu Cai , Balasubramanian Pranatharthiharan , Pranita Kulkarni
CPC classification number: H01L29/42364 , H01L21/28247 , H01L29/517 , H01L29/66545 , H01L29/66795 , H01L29/78
Abstract: One method disclosed herein includes forming first and second gate cap protection layers that encapsulate and protect a gate cap layer. A novel transistor device disclosed herein includes a gate structure positioned above a semiconductor substrate, a spacer structure positioned adjacent the gate structure, a layer of insulating material positioned above the substrate and around the spacer structure, a gate cap layer positioned above the gate structure and the spacer structure, and a gate cap protection material that encapsulates the gate cap layer, wherein portions of the gate cap protection material are positioned between the gate cap layer and the gate structure, the spacer structure and the layer of insulating material.
Abstract translation: 本文公开的一种方法包括形成封装并保护栅极盖层的第一和第二栅极盖保护层。 本文公开的新型晶体管器件包括位于半导体衬底上方的栅极结构，邻近栅极结构定位的间隔结构，位于衬底上方并围绕间隔结构的绝缘材料层，位于栅极结构之上的栅极盖层， 所述间隔结构以及封装所述栅极盖层的栅极帽保护材料，其中所述栅极盖保护材料的部分位于所述栅极盖层和所述栅极结构之间，所述间隔物结构和所述绝缘材料层。
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5.发明授权公开(公告)号：US09478658B2
公开(公告)日：2016-10-25
申请号：US14717551
申请日：2015-05-20
Applicant: GLOBALFOUNDRIES INC.
Inventor： Kangguo Cheng , Bruce B. Doris , Ali Khakifirooz , Pranita Kulkarni , Ghavam G. Shahidi
IPC: H01L29/10 , H01L29/76 , H01L31/036 , H01L31/112 , H01L29/78 , H01L21/02 , H01L21/265
CPC classification number: H01L29/7847 , H01L21/02532 , H01L21/02664 , H01L21/26506 , H01L29/7841 , H01L29/785
Abstract: A device and method for inducing stress in a semiconductor layer includes providing a substrate having a dielectric layer formed between a first semiconductor layer and a second semiconductor layer and processing the second semiconductor layer to form an amorphized material. A stress layer is deposited on the first semiconductor layer. The wafer is annealed to memorize stress in the second semiconductor layer by recrystallizing the amorphized material.
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6.发明授权Methods of forming a semiconductor device with a protected gate cap layer and the resulting device 有权用保护的栅极盖层形成半导体器件的方法和所得到的器件公开(公告)号：US09263537B2
公开(公告)日：2016-02-16
申请号：US14526126
申请日：2014-10-28
Inventor： Daniel Pham , Xiuyu Cai , Balasubramanian Pranatharthiharan , Pranita Kulkarni
CPC classification number: H01L29/42364 , H01L21/28247 , H01L29/517 , H01L29/66545 , H01L29/66795 , H01L29/78
Abstract: One method disclosed herein includes forming first and second gate cap protection layers that encapsulate and protect a gate cap layer. A novel transistor device disclosed herein includes a gate structure positioned above a semiconductor substrate, a spacer structure positioned adjacent the gate structure, a layer of insulating material positioned above the substrate and around the spacer structure, a gate cap layer positioned above the gate structure and the spacer structure, and a gate cap protection material that encapsulates the gate cap layer, wherein portions of the gate cap protection material are positioned between the gate cap layer and the gate structure, the spacer structure and the layer of insulating material.
Abstract translation: 本文公开的一种方法包括形成封装并保护栅极盖层的第一和第二栅极盖保护层。 本文公开的新型晶体管器件包括位于半导体衬底上方的栅极结构，邻近栅极结构定位的间隔结构，位于衬底上方并围绕间隔结构的绝缘材料层，位于栅极结构之上的栅极盖层， 所述间隔结构以及封装所述栅极盖层的栅极帽保护材料，其中所述栅极盖保护材料的部分位于所述栅极盖层和所述栅极结构之间，所述间隔物结构和所述绝缘材料层。
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7.发明申请METHODS OF FORMING A SEMICONDUCTOR DEVICE WITH A PROTECTED GATE CAP LAYER AND THE RESULTING DEVICE 有权形成具有保护盖板层和结构设备的半导体器件的方法公开(公告)号：US20140264486A1
公开(公告)日：2014-09-18
申请号：US13839626
申请日：2013-03-15
Inventor： Daniel Pham , Xiuyu Cai , Balasubramanian Pranatharthiharan , Pranita Kulkarni
IPC: H01L29/423 , H01L29/78 , H01L21/28
CPC classification number: H01L29/4232 , H01L21/28247 , H01L29/66545 , H01L29/78
Abstract: One method includes forming a recessed gate/spacer structure that partially defines a spacer/gate cap recess, forming a gate cap layer in the spacer/gate cap recess, forming a gate cap protection layer on an upper surface of the gate cap layer, and removing portions of the gate cap protection layer, leaving a portion of the gate cap protection layer positioned on the upper surface of the gate cap layer. A device disclosed herein includes a gate/spacer structure positioned in a layer of insulating material, a gate cap layer positioned on the gate/spacer structure, wherein sidewalls of the gate cap layer contact the layer of insulating material, and a gate cap protection layer positioned on an upper surface of the gate cap layer, wherein the sidewalls of the gate cap protection layer also contact the layer of insulating material.
Abstract translation: 一种方法包括形成凹入的栅极/间隔结构，其部分地限定间隔物/栅极盖凹部，在间隔物/栅极盖凹部中形成栅极盖层，在栅极盖层的上表面上形成栅极盖保护层，以及 去除栅极帽保护层的部分，留下栅极盖保护层的一部分位于栅极盖层的上表面上。 本文公开的装置包括定位在绝缘材料层中的栅极/间隔结构，位于栅极/间隔物结构上的栅极盖层，其中栅极盖层的侧壁接触绝缘材料层，栅极盖保护层 定位在栅极盖层的上表面上，其中栅极盖保护层的侧壁也接触绝缘材料层。
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