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公开(公告)号:US20210050412A1
公开(公告)日:2021-02-18
申请号:US16538785
申请日:2019-08-12
Applicant: GLOBALFOUNDRIES INC.
Inventor: Chun Yu WONG , Haiting Wang , Yong Jun Shi , Xiaoming Yang , Liu Jiang
IPC: H01L29/06 , H01L23/66 , H01L21/764 , H01L21/768
Abstract: A semiconductor device is provided, which includes an active region, a first structure, a second gate structure, a first gate dielectric sidewall, a second gate dielectric sidewall, a first air gap region, a second air gap region and a contact structure. The active region is formed over a substrate. The first and second gate structures are formed over the active region and between the first gate structure and the second gate structure are the first gate dielectric sidewall, the first air gap region, the contact structure, the second air gap region and a second gate dielectric sidewall.
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公开(公告)号:US20190312117A1
公开(公告)日:2019-10-10
申请号:US15949730
申请日:2018-04-10
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Yi Qi , Hsien-Ching Lo , Hong Yu , Yanping Shen , Wei Hong , Xing Zhang , Ruilong Xie , Haiting Wang , Hui Zhan , Yong Jun Shi
IPC: H01L29/417 , H01L29/78 , H01L29/423 , H01L29/08 , H01L29/45 , H01L21/306 , H01L29/66 , H01L21/02
Abstract: One illustrative FinFET device disclosed herein includes a source/drain structure that, when viewed in a cross-section taken through the fin in a direction corresponding to the gate width (GW) direction of the device, comprises a perimeter and a bottom surface. The source/drain structure also has an axial length that extends in a direction corresponding to the gate length (GL) direction of the device. The device also includes a metal silicide material positioned on at least a portion of the perimeter of the source/drain structure for at least a portion of the axial length of the source/drain structure and on at least a portion of the bottom surface of the source/drain structure for at least a portion of the axial length of the source/drain structure.
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公开(公告)号:US10700173B2
公开(公告)日:2020-06-30
申请号:US15949730
申请日:2018-04-10
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Yi Qi , Hsien-Ching Lo , Hong Yu , Yanping Shen , Wei Hong , Xing Zhang , Ruilong Xie , Haiting Wang , Hui Zhan , Yong Jun Shi
IPC: H01L29/417 , H01L29/78 , H01L29/08 , H01L29/423 , H01L29/45 , H01L21/306 , H01L29/66 , H01L21/02 , H01L21/3105 , H01L29/165
Abstract: One illustrative FinFET device disclosed herein includes a source/drain structure that, when viewed in a cross-section taken through the fin in a direction corresponding to the gate width (GW) direction of the device, comprises a perimeter and a bottom surface. The source/drain structure also has an axial length that extends in a direction corresponding to the gate length (GL) direction of the device. The device also includes a metal silicide material positioned on at least a portion of the perimeter of the source/drain structure for at least a portion of the axial length of the source/drain structure and on at least a portion of the bottom surface of the source/drain structure for at least a portion of the axial length of the source/drain structure.
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