公开(公告)号：US20250015128A1

公开(公告)日：2025-01-09

申请号：US18894485

申请日：2024-09-24

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Vibhor JAIN ,  Anthony K. STAMPER ,  John J. ELLIS-MONAGHAN ,  Steven M. SHANK ,  Rajendran KRISHNASAMY

IPC: H01L29/06 ,  H01L21/763 ,  H01L29/08 ,  H01L29/165 ,  H01L29/66 ,  H01L29/737

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors (HBTs) with a buried trap rich region and methods of manufacture. The structure includes: a trap rich isolation region embedded within the bulk substrate; and a heterojunction bipolar transistor above the trap rich isolation region, with its sub-collector region separated by the trap rich isolation region by a layer of the bulk substrate.

公开(公告)号：US20240297216A1

公开(公告)日：2024-09-05

申请号：US18659282

申请日：2024-05-09

Applicant: GlobalFoundries U.S. Inc.

Inventor： Anthony K. STAMPER ,  Siva P. ADUSUMILLI ,  Bruce W. PORTH ,  John J. ELLIS-MONAGHAN

IPC: H01L29/06 ,  H01L21/02 ,  H01L21/762 ,  H01L21/764

CPC classification number: H01L29/0649 ,  H01L21/02505 ,  H01L21/7624 ,  H01L21/764

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a semiconductor on insulator substrate with cavity structures and methods of manufacture. The structure includes: a bulk substrate with at least one rectilinear cavity structure; an insulator material sealing the at least one rectilinear cavity structure; and a buried insulator layer on the bulk substrate and over the at least one rectilinear cavity structure.

公开(公告)号：US20220122968A1

公开(公告)日：2022-04-21

申请号：US17075056

申请日：2020-10-20

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Vibhor JAIN ,  John J. ELLIS-MONAGHAN ,  Anthony K. STAMPER ,  Steven M. SHANK ,  John J. PEKARIK

IPC: H01L27/082 ,  H01L29/06 ,  H01L29/737 ,  H01L27/06

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors (HBTs) with a buried trap rich isolation region and methods of manufacture. The structure includes: a first heterojunction bipolar transistor; a second heterojunction bipolar transistor; and a trap rich isolation region embedded within a substrate underneath both the first heterojunction bipolar transistor and the second heterojunction bipolar transistor.

公开(公告)号：US20230420596A1

公开(公告)日：2023-12-28

申请号：US17849285

申请日：2022-06-24

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： John J. ELLIS-MONAGHAN ,  Rajendran KRISHNASAMY ,  Siva P. ADUSUMILLI ,  Ramsey HAZBUN

IPC: H01L31/105 ,  H01L31/0288 ,  H01L31/18

CPC classification number: H01L31/105 ,  H01L31/0288 ,  H01L31/1804 ,  H01L31/0216

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a photodetector and methods of manufacture. The structure includes: a photodetector; and a semiconductor material on the photodetector, the semiconductor material comprising a first dopant type, a second dopant type and intrinsic semiconductor material separating the first dopant type from the second dopant type.

公开(公告)号：US20220199525A1

公开(公告)日：2022-06-23

申请号：US17126921

申请日：2020-12-18

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Anthony K. STAMPER ,  John J. ELLIS-MONAGHAN ,  Steven M. SHANK ,  John J. PEKARIK ,  Vibhor JAIN

IPC: H01L23/525 ,  H01L27/12 ,  H01L23/532

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a metal-free fuse structure and methods of manufacture. The structure includes: a first metal-free fuse structure comprising a top semiconductor material of semiconductor-on-insulator (SOI) technologies, the top semiconductor material including end portions with a first electrical resistance and a fuse portion of a second, higher electrical resistance electrically connected to the end portions; and a second metal-free fuse structure comprising the top semiconductor material of semiconductor-on-insulator (SOI) technologies, the top semiconductor material of the second metal-free fuse structure including at least a fuse portion of a lower electrical resistance than the second, higher electrical resistance.

公开(公告)号：US20220029032A1

公开(公告)日：2022-01-27

申请号：US16935854

申请日：2020-07-22

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Mark D. LEVY ,  Edward W. KIEWRA ,  Siva P. ADUSUMILLI ,  John J. ELLIS-MONAGHAN

IPC: H01L29/868 ,  H01L29/06 ,  H01L29/66 ,  H01L31/107

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to photodiodes and/or PIN diode structures and methods of manufacture. The structure includes: a spiral fin structure comprising semiconductor substrate material and dielectric material; a photosensitive semiconductor material over sidewalls and a top surface of the spiral fin structure, the photosensitive semiconductor material positioned to capture laterally emitted incident light; a doped semiconductor material above the photosensitive semiconductor material; and contacts electrically contacting the semiconductor substrate material and the doped semiconductor material from a top surface thereof.

公开(公告)号：US20210335731A1

公开(公告)日：2021-10-28

申请号：US16855185

申请日：2020-04-22

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Vibhor JAIN ,  Ajay RAMAN ,  Sebastian T. VENTRONE ,  John J. ELLIS-MONAGHAN ,  Siva P. ADUSUMILLI ,  Yves T. NGU

IPC: H01L23/00

Abstract: The present disclosure relates to an active x-ray attack prevention structure for secure integrated circuits. In particular, the present disclosure relates to a structure including a functional circuit, and at least one latchup sensitive diode circuit configured to induce a latchup condition in the functional circuit, placed in proximity of the functional circuit.

公开(公告)号：US20210159336A1

公开(公告)日：2021-05-27

申请号：US16691691

申请日：2019-11-22

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Anthony K. STAMPER ,  Aaron L. VALLETT ,  Steven M. SHANK ,  John J. ELLIS-MONAGHAN

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/08 ,  H01L29/45 ,  H01L29/417 ,  H01L29/66

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to vertical field effect transistors (FETS) and methods of manufacture. The structure includes: a substrate material; at least one vertically oriented gate structure extending into the substrate material and composed of a gate dielectric material and conductive gate material; and vertically oriented source/drain regions extending into the substrate material and composed of conductive dopant material and a silicide on the source/drain regions.

公开(公告)号：US20220352401A1

公开(公告)日：2022-11-03

申请号：US17863922

申请日：2022-07-13

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Rajendran KRISHNASAMY ,  Steven M. SHANK ,  John J. ELLIS-MONAGHAN ,  Ramsey HAZBUN

IPC: H01L31/0352 ,  H01L31/0232 ,  H01L31/18 ,  H01L31/103 ,  H01L31/028

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a photodiode with an integrated, light focusing elements and methods of manufacture. The structure includes: a trench photodiode comprising a domed structure; and a doped material on the domed structure, the doped material having a concave underside surface.

公开(公告)号：US20210376180A1

公开(公告)日：2021-12-02

申请号：US16887375

申请日：2020-05-29

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Siva P. ADUSUMILLI ,  John J. ELLIS-MONAGHAN ,  Mark D. LEVY ,  Vibhor JAIN ,  Andre STURM

IPC: H01L31/107 ,  H01L31/105 ,  H01L31/0312 ,  H01L31/028 ,  H01L31/036

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to photodiodes and/or PIN diode structures and methods of manufacture. The structure includes: at least one fin including substrate material, the at least one fin including sidewalls and a top surface; a trench on opposing sides of the at least one fin; a first semiconductor material lining the sidewalls and the top surface of the at least one fin, and a bottom surface of the trench; a photosensitive semiconductor material on the first semiconductor material and at least partially filling the trench; and a third semiconductor material on the photosensitive semiconductor material.