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1.
公开(公告)号:US20230238428A1
公开(公告)日:2023-07-27
申请号:US17582550
申请日:2022-01-24
Applicant: GlobalFoundries U.S. Inc.
Inventor: Rong-Ting Liou , Man Gu , Jeffrey B. Johnson , Wang Zheng , Jagar Singh , Haiting Wang
IPC: H01L29/06 , H01L29/78 , H01L29/66 , H01L21/762
CPC classification number: H01L29/0653 , H01L29/7816 , H01L29/66681 , H01L21/76224
Abstract: An IC structure that includes a trench isolation (TI) in a substrate having three portions of different dielectric materials. The portions may also have different widths. The TI may include a lower portion including a first dielectric material and having a first width, a middle portion including the first dielectric material and an outer second dielectric material, and an upper portion including a third dielectric material and having a second width greater than the first width. The first, second and third dielectric materials are different.
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公开(公告)号:US20210399116A1
公开(公告)日:2021-12-23
申请号:US16907600
申请日:2020-06-22
Applicant: GLOBALFOUNDRIES U.S. INC.
Inventor: Jagar Singh , Sudarshan Narayanan , Alvin J. Joseph , William J. Taylor, JR. , Jeffrey B. Johnson
Abstract: A structure includes a first source/drain region and a second source/drain region in a semiconductor body; and a trench isolation between the first and second source/drain regions in the semiconductor body. A first doping region is about the first source/drain region, a second doping region about the second source/drain region, and the trench isolation is within the second doping region. A third doping region is adjacent to the first doping region and extend partially into the second doping region to create a charge trap section. A gate conductor of a gate structure is over the trench isolation and the first, second, and third doping regions. The charge trap section creates a charge controlled e-fuse operable by applying a stress voltage to the gate conductor.
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3.
公开(公告)号:US20230223463A1
公开(公告)日:2023-07-13
申请号:US17574661
申请日:2022-01-13
Applicant: GlobalFoundries U.S. Inc.
Inventor: Judson R. Holt , Vibhor Jain , Jeffrey B. Johnson , John J. Pekarik
IPC: H01L29/737 , H01L29/06 , H01L21/763 , H01L29/66
CPC classification number: H01L29/7371 , H01L29/0642 , H01L21/763 , H01L29/66242
Abstract: Embodiments of the disclosure provide a bipolar transistor structure with a collector on a polycrystalline isolation layer. A polycrystalline isolation layer may be on a substrate, and a collector layer may be on the polycrystalline isolation layer. The collector layer has a first doping type and includes a polycrystalline semiconductor. A base layer is on the collector layer and has a second doping type opposite the first doping type. An emitter layer is on the base layer and has the first doping type. A material composition of the doped collector region is different from a material composition of the base layer.
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4.
公开(公告)号:US20230155011A1
公开(公告)日:2023-05-18
申请号:US17695892
申请日:2022-03-16
Applicant: GlobalFoundries U.S. Inc.
Inventor: Shesh Mani Pandey , Jeffrey B. Johnson
IPC: H01L29/735 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/66
CPC classification number: H01L29/735 , H01L29/0649 , H01L29/0808 , H01L29/0821 , H01L29/1008 , H01L29/6625
Abstract: A disclosed structure includes a bipolar junction transistor (BJT) and a method of forming the structure. The structure includes a semiconductor layer on an insulator layer. The BJT includes a base region positioned laterally between emitter and collector regions. The emitter region includes an emitter portion of the semiconductor layer and an emitter semiconductor layer, which is within an emitter cavity in the insulator layer, which extends through an emitter opening in the emitter portion, and which covers the top of the emitter portion. The collector region includes a collector portion of the semiconductor layer and a collector semiconductor layer, which is within a collector cavity in the insulator layer, which extends through a collector opening in the collector portion, and which covers the top of the collector portion. Optionally, the structure also includes air pockets within the emitter and collector cavities.
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公开(公告)号:US11387353B2
公开(公告)日:2022-07-12
申请号:US16907600
申请日:2020-06-22
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Jagar Singh , Sudarshan Narayanan , Alvin J. Joseph , William J. Taylor, Jr. , Jeffrey B. Johnson
IPC: H01L29/68 , H01L29/08 , H01L29/06 , H01L29/10 , H01L27/112
Abstract: A structure includes a first source/drain region and a second source/drain region in a semiconductor body; and a trench isolation between the first and second source/drain regions in the semiconductor body. A first doping region is about the first source/drain region, a second doping region about the second source/drain region, and the trench isolation is within the second doping region. A third doping region is adjacent to the first doping region and extend partially into the second doping region to create a charge trap section. A gate conductor of a gate structure is over the trench isolation and the first, second, and third doping regions. The charge trap section creates a charge controlled e-fuse operable by applying a stress voltage to the gate conductor.
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公开(公告)号:US11749747B2
公开(公告)日:2023-09-05
申请号:US17574661
申请日:2022-01-13
Applicant: GlobalFoundries U.S. Inc.
Inventor: Judson R. Holt , Vibhor Jain , Jeffrey B. Johnson , John J. Pekarik
IPC: H01L29/737 , H01L29/66 , H01L21/763 , H01L29/06
CPC classification number: H01L29/7371 , H01L21/763 , H01L29/0642 , H01L29/66242
Abstract: Embodiments of the disclosure provide a bipolar transistor structure with a collector on a polycrystalline isolation layer. A polycrystalline isolation layer may be on a substrate, and a collector layer may be on the polycrystalline isolation layer. The collector layer has a first doping type and includes a polycrystalline semiconductor. A base layer is on the collector layer and has a second doping type opposite the first doping type. An emitter layer is on the base layer and has the first doping type. A material composition of the doped collector region is different from a material composition of the base layer.
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公开(公告)号:US11894450B2
公开(公告)日:2024-02-06
申请号:US17695892
申请日:2022-03-16
Applicant: GlobalFoundries U.S. Inc.
Inventor: Shesh Mani Pandey , Jeffrey B. Johnson
IPC: H01L29/735 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/66
CPC classification number: H01L29/735 , H01L29/0649 , H01L29/0808 , H01L29/0821 , H01L29/1008 , H01L29/6625
Abstract: A disclosed structure includes a bipolar junction transistor (BJT) and a method of forming the structure. The structure includes a semiconductor layer on an insulator layer. The BJT includes a base region positioned laterally between emitter and collector regions. The emitter region includes an emitter portion of the semiconductor layer and an emitter semiconductor layer, which is within an emitter cavity in the insulator layer, which extends through an emitter opening in the emitter portion, and which covers the top of the emitter portion. The collector region includes a collector portion of the semiconductor layer and a collector semiconductor layer, which is within a collector cavity in the insulator layer, which extends through a collector opening in the collector portion, and which covers the top of the collector portion. Optionally, the structure also includes air pockets within the emitter and collector cavities.
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