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    Circuit and method for enabling a function in a multiple memory device module
    1.
    发明授权
    Circuit and method for enabling a function in a multiple memory device module 失效
    用于启用多存储器件模块中的功能的电路和方法

    公开(公告)号：US5920516A

    公开(公告)日：1999-07-06

    申请号：US42129

    申请日：1998-03-12

    申请人： Gary R. Gilliam ,  Kevin G. Duesman ,  Leland R. Nevill

    发明人： Gary R. Gilliam ,  Kevin G. Duesman ,  Leland R. Nevill

    IPC分类号： G06F12/16 ,  G11C29/00 ,  G11C7/00

    CPC分类号： G11C29/80 ,  G11C29/808

    摘要： A memory device module in a package having externally accessible contacts includes multiple integrated memory circuits accessible to external circuitry exclusively through the contacts. An accessing circuit for each memory circuit accesses memory cells in the memory circuit for communication with the external circuitry. Each accessing circuit can be enabled to access redundant memory cells instead of inoperative memory cells by an enabling signal. An enabling circuit for each accessing circuit can output the enabling signal in response to receiving a unique set of input signals from external circuitry. Each unique set is selected with fuses in each enabling circuit, and includes row and column address strobe signals and a data signal. Upon receiving its unique set, one of the enabling circuits advantageously enables its associated accessing circuit to access redundant memory cells without the accessing circuits of the other memory circuits also being so enabled.

    摘要翻译： 具有外部可访问触点的封装中的存储器件模块包括仅通过触点对外部电路可访问的多个集成存储器电路。 每个存储器电路的访问电路访问存储器电路中的存储器单元以与外部电路通信。 可以通过使能信号使每个访问电路能够访问冗余存储器单元而不是不工作的存储器单元。 每个访问电路的使能电路可以响应于从外部电路接收到一组唯一的输入信号而输出使能信号。 每个独特的集合在每个使能电路中选择熔丝，并包括行和列地址选通信号和数据信号。 在接收到其唯一的集合之后，启用电路之一有利地使其相关联的访问电路访问冗余存储器单元，而其他存储器电路的访问电路也被启用。

    Circuit and method for enabling a function in a multiple memory device module
    2.
    发明授权
    Circuit and method for enabling a function in a multiple memory device module 失效

    公开(公告)号：US5825697A

    公开(公告)日：1998-10-20

    申请号：US577840

    申请日：1995-12-22

    申请人： Gary R. Gilliam ,  Kevin G. Duesman ,  Leland R. Nevill

    发明人： Gary R. Gilliam ,  Kevin G. Duesman ,  Leland R. Nevill

    IPC分类号： G06F12/16 ,  G11C29/00 ,  G11C7/00

    CPC分类号： G11C29/80 ,  G11C29/808

    摘要： A memory device module in a package having externally accessible contacts includes multiple integrated memory circuits accessible to external circuitry exclusively through the contacts. An accessing circuit for each memory circuit accesses memory cells in the memory circuit for communication with the external circuitry. Each accessing circuit can be enabled to access redundant memory cells instead of inoperative memory cells by an enabling signal. An enabling circuit for each accessing circuit can output the enabling signal in response to receiving a unique set of input signals from external circuitry. Each unique set is selected with fuses in each enabling circuit, and includes row and column address strobe signals and a data signal. Upon receiving its unique set, one of the enabling circuits advantageously enables its associated accessing circuit to access redundant memory cells without the accessing circuits of the other memory circuits also being so enabled.

    Method and apparatus for back-end repair of multi-chip modules
    6.
    发明授权
    Method and apparatus for back-end repair of multi-chip modules 失效
    用于多芯片模块后端修复的方法和装置

    公开(公告)号：US5764574A

    公开(公告)日：1998-06-09

    申请号：US666247

    申请日：1996-06-20

    申请人： Leland R. Nevill ,  Gary R. Gilliam ,  Kevin Duesman

    发明人： Leland R. Nevill ,  Gary R. Gilliam ,  Kevin Duesman

    IPC分类号： G11C29/00 ,  G11C7/00

    CPC分类号： G11C29/785

    摘要： A method and apparatus for independent redundancy programming of individual components of a multiple-component semiconductor device assembly. In the disclosed embodiment, a multiple-chip memory module includes a plurality of memory devices each having redundant circuitry therein for facilitating backend repair of those devices should a defective memory cell (or group of memory cells) be detected. The redundant circuitry in each device is responsive to a predetermined combination of programming signals applied to terminals of that device to activate a redundant column (or row) of memory cells into operation in place of a column (or row) containing a defective memory cell. In the disclosed embodiment, the predetermined combination of programming signals includes at least one signal applied to a data terminal of the device. The interconnection of individual memory devices in the multiple-device assembly is such that a predetermined combination of signals applied to predetermined terminals of the assembly, including at least one data terminal thereof, can uniquely identify an individual one of the plurality of individual memory devices in the assembly, facilitating back-end repair of the assembly without requiring disassembly thereof.

    摘要翻译： 一种用于多分量半导体器件组件的各个部件的独立冗余编程的方法和装置。 在所公开的实施例中，多芯片存储器模块包括多个存储器件，每个存储器件在其中具有冗余电路，用于在检测到缺陷存储器单元（或存储器单元组）时便于对这些器件进行后端修复。 每个设备中的冗余电路响应于施加到该设备的终端的编程信号的预定组合，以激活存储器单元的冗余列（或行）来代替包含有缺陷的存储器单元的列（或行）。 在所公开的实施例中，编程信号的预定组合包括施加到设备的数据终端的至少一个信号。 多器件组件中的各个存储器件的互连使得施加到组件的预定端子（包括其至少一个数据端）的预定信号组合可以唯一地识别多个单独存储器件中的单个存储器件 该组件有助于组装的后端修复而不需要拆卸组件。

    Method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer
    7.
    发明授权
    Method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer 失效
    用于从半导体晶片上的其它IC隔离短路集成电路（IC）的方法

    公开(公告)号：US07567091B2

    公开(公告)日：2009-07-28

    申请号：US12017262

    申请日：2008-01-21

    申请人： Warren M. Farnworth ,  William K. Waller ,  Leland R. Nevill ,  Raymond J. Beffa ,  Eugene H. Cloud

    发明人： Warren M. Farnworth ,  William K. Waller ,  Leland R. Nevill ,  Raymond J. Beffa ,  Eugene H. Cloud

    IPC分类号： G01R31/26

    CPC分类号： G01R31/025 ,  G01R31/2884

    摘要： A circuit for isolating a short-circuited integrated circuit (IC) formed on the surface of a semiconductor wafer from other ICs formed on the wafer that are interconnected with the short-circuited IC includes control circuitry within the short-circuited IC for sensing the short circuit. The control circuitry may sense the short circuit in a variety of ways, including sensing excessive current drawn by the short-circuited IC, and sensing an abnormally low or high voltage within the short-circuited IC. Switching circuitry also within the short-circuited IC selectively isolates the short-circuited IC from the other ICs on the wafer in response to the control circuitry sensing the short circuit. As a result, if the wafer is under probe test, for example, testing can continue uninterrupted on the other ICs while the short-circuited IC is isolated.

    摘要翻译： 用于将形成在半导体晶片的表面上的短路集成电路（IC）与形成在晶片上的与短路IC互连的其他IC隔离的电路包括用于感测短路IC的短路IC内的控制电路 电路。 控制电路可以以各种方式感测短路，包括感测由短路IC吸引的过电流，以及感测短路IC内的异常低或高电压。 短路IC内的开关电路响应于控制电路感测短路而选择性地将短路IC与晶片上的其它IC隔离。 结果，如果晶片处于探针测试之下，例如，在短路IC隔离的同时，其它IC上的测试可以不中断地继续。

    Device and method for isolating a short-circuited integrated circuit (IC) from other IC's on a semiconductor wafer
    8.
    发明授权
    Device and method for isolating a short-circuited integrated circuit (IC) from other IC's on a semiconductor wafer 失效
    用于从半导体晶片上的其他IC隔离短路集成电路（IC）的装置和方法

    公开(公告)号：US06313658B1

    公开(公告)日：2001-11-06

    申请号：US09083819

    申请日：1998-05-22

    申请人： Warren M. Farnworth ,  William K. Waller ,  Leland R. Nevill ,  Raymond J. Beffa ,  Eugene H. Cloud

    发明人： Warren M. Farnworth ,  William K. Waller ,  Leland R. Nevill ,  Raymond J. Beffa ,  Eugene H. Cloud

    IPC分类号： G01R3126

    CPC分类号： G01R31/025 ,  G01R31/2884

    摘要： A circuit for isolating a short-circuited integrated circuit (IC) formed on the surface of a semiconductor wafer from other ICs formed on the wafer that are interconnected with the short-circuited IC includes control circuitry within the short-circuited IC for sensing the short circuit. The control circuitry may sense the short circuit in a variety of ways, including sensing excessive current drawn by the short-circuited IC, and sensing an abnormally low or high voltage within the short-circuited IC. Switching circuitry also within the short-circuited IC selectively isolates the short-circuited IC from the other ICs on the wafer in response to the control circuitry sensing the short circuit. As a result, if the wafer is under probe test, for example, testing can continue uninterrupted on the other ICs while the short-circuited IC is isolated.

    摘要翻译： 用于将形成在半导体晶片的表面上的短路集成电路（IC）与形成在晶片上的与短路IC互连的其他IC隔离的电路包括用于感测短路IC的短路IC内的控制电路 电路。 控制电路可以以各种方式感测短路，包括感测由短路IC吸引的过电流，以及感测短路IC内的异常低或高电压。 短路IC内的开关电路响应于控制电路感测短路而选择性地将短路IC与晶片上的其它IC隔离。 结果，如果晶片处于探针测试之下，例如，在短路IC隔离的同时，其它IC上的测试可以不中断地继续。

    Uniform temperature environmental testing apparatus for semiconductor devices
    9.
    发明授权
    Uniform temperature environmental testing apparatus for semiconductor devices 失效
    半导体器件均匀温度环境检测仪器

    公开(公告)号：US6154042A

    公开(公告)日：2000-11-28

    申请号：US637484

    申请日：1996-04-24

    申请人： Leland R. Nevill

    发明人： Leland R. Nevill

    IPC分类号： G01R31/28 ,  G01R31/02

    CPC分类号： G01R31/2874

    摘要： A method and apparatus for maintaining a uniform temperature of semiconductor devices mounted on a burn-in board. A cover is positioned on the burn-in board to enclose all of the semiconductor devices mounted on the board. A plurality of such burn-in boards are then placed in a burn-in oven of conventional design for burn-in testing of the semiconductor devices. The cover prevents a non-uniform airflow along the semiconductor devices which would cause the semiconductor devices to have a non-uniform temperature distribution.

    摘要翻译： 一种用于保持安装在老化板上的半导体器件的均匀温度的方法和装置。 盖板位于老化板上以封闭安装在板上的所有半导体器件。 然后将多个这样的老化板放置在常规设计的老化炉中，以便对半导体器件进行老化测试。 盖子防止沿着半导体器件的不均匀气流，这将导致半导体器件具有不均匀的温度分布。

    Uniform temperature environmental testing method for semiconductor devices
    10.
    发明授权
    Uniform temperature environmental testing method for semiconductor devices 有权
    半导体器件均匀温度环境测试方法

    公开(公告)号：US6114868A

    公开(公告)日：2000-09-05

    申请号：US389285

    申请日：1999-09-02

    申请人： Leland R. Nevill

    发明人： Leland R. Nevill

    IPC分类号： G01R31/28 ,  G01R31/02

    CPC分类号： G01R31/2874

    摘要： A method and apparatus for maintaining a uniform temperature of semiconductor devices mounted on a burn-in board. A cover is positioned on the burn-in board to enclose all of the semiconductor devices mounted on the board. A plurality of such burn-in boards are then placed in a burn-in oven of conventional design for burn-in testing of the semiconductor devices. The cover prevents a non-uniform airflow along the semiconductor devices which would cause the semiconductor devices to have a non-uniform temperature distribution.

    摘要翻译： 一种用于保持安装在老化板上的半导体器件的均匀温度的方法和装置。 盖板位于老化板上以封闭安装在板上的所有半导体器件。 然后将多个这样的老化板放置在常规设计的老化炉中，以便对半导体器件进行老化测试。 盖子防止沿着半导体器件的不均匀气流，这将导致半导体器件具有不均匀的温度分布。