公开(公告)号：US20190006281A1

公开(公告)日：2019-01-03

申请号：US15637641

申请日：2017-06-29

申请人： Georg Seidemann ,  Bernd Waidhas ,  Thomas Wagner ,  Andreas Wolter ,  Laurent Millou

发明人： Georg Seidemann ,  Bernd Waidhas ,  Thomas Wagner ,  Andreas Wolter ,  Laurent Millou

IPC分类号： H01L23/538 ,  H01L23/498 ,  H01L25/065 ,  G11C16/18

CPC分类号： H01L23/5382 ,  G11C16/18 ,  H01L23/49861 ,  H01L24/16 ,  H01L24/32 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/4826 ,  H01L2224/73253 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/92225 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15313

摘要： A multi-chip module includes two silicon bridge interconnects and three components that are tied together by the bridges with one of the components in the center. At least one of the silicon bridge interconnects is bent to create a non-planar chip-module form factor. Cross-connected multi-chip silicon bent-bridge interconnect modules include the two silicon bridges contacting the center component at right angles to each other, plus a fourth component and a third silicon bridge interconnect contacting the fourth component and any one of the original three components.

公开(公告)号：US20180277512A1

公开(公告)日：2018-09-27

申请号：US15464920

申请日：2017-03-21

申请人： Bernd Waidhas ,  Georg Seidemann ,  Andreas Wolter ,  Thomas Wagner ,  Stephan Stoeckl ,  Laurent Millou

发明人： Bernd Waidhas ,  Georg Seidemann ,  Andreas Wolter ,  Thomas Wagner ,  Stephan Stoeckl ,  Laurent Millou

IPC分类号： H01L25/065 ,  H01L23/538 ,  H01L23/498 ,  H01L23/00 ,  H01L21/56 ,  H01L25/00

摘要： An embedded-bridge substrate connector apparatus includes a patterned reference layer to which a first module and a subsequent module are aligned and the two modules are mated at the patterned reference layer. At least one module includes a silicon bridge connector that bridges to two devices, through the patterned reference layer, to the mated module.

公开(公告)号：US20180190589A1

公开(公告)日：2018-07-05

申请号：US15394388

申请日：2016-12-29

申请人： Bernd Waidhas ,  Stephan Stoeckl ,  Andreas Wolter ,  Reinhard Mahnkopf ,  Georg Seidemann ,  Thomas Wagner ,  Laurent Millou

发明人： Bernd Waidhas ,  Stephan Stoeckl ,  Andreas Wolter ,  Reinhard Mahnkopf ,  Georg Seidemann ,  Thomas Wagner ,  Laurent Millou

IPC分类号： H01L23/538 ,  H01L25/065 ,  H01L23/00 ,  H01L21/48 ,  H01L23/053

CPC分类号： H01L23/5386 ,  H01L21/4846 ,  H01L23/053 ,  H01L23/5387 ,  H01L24/14 ,  H01L24/16 ,  H01L24/48 ,  H01L25/0655 ,  H01L2224/13024 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2924/00014 ,  H01L2924/01014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/15738 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2224/13099

摘要： A bent-bridge semiconductive apparatus includes a silicon bridge that is integral to a semiconductive device and the silicon bridge is deflected out of planarity. The silicon bridge may couple two semiconductive devices, all of which are from an integral processed die.