摘要:
A memory structure is provided. The memory structure comprises M array regions and N contact regions. M is an integer ≥2. N is an integer ≥M. Each array region is coupled to at least one contact region. Each contact region comprises a stair structure and a plurality of contacts. The stair structure comprises alternately stacked conductive layers and insulating layers. Each contact is connected to one conductive layer of the stair structure. Two array regions which are adjacent to each other are spatially separated by two contact regions, which are coupled to the two array regions, respectively.
摘要:
Each memory cell of an EPROM contains two MOSFETs and a data of each memory cell is read out by detecting a current difference between the two MOSFETs by using a differential amplifier. In such constitution as described above, even when the data is erased by irradiating an ultraviolet ray, a stable output of the differential amplifier can be obtained and, therefore, confirmation of an initialized state can be facilitated. Specifically, a channel width WA of one of the two MOSFETs constituting the memory cell is formed narrower than a channel width WB of the other. By such arrangement as described above, in an initialized state in which the ultraviolet ray is irradiated, a data signal current value IHA of the MOSFET having the channel width WA becomes smaller than a data signal current value IHB flowing in the MOSFET having the channel width WB. Accordingly, the output of the differential amplifier is fixed in accordance with a current magnitude relation of IHA
摘要翻译:EPROM的每个存储单元包含两个MOSFET,并且通过使用差分放大器检测两个MOSFET之间的电流差来读出每个存储单元的数据。 在这样构成的情况下,即使通过照射紫外线来擦除数据,也能够获得稳定的差分放大器的输出,因此能够促进初始化状态的确认。 具体地,构成存储单元的两个MOSFET之一的沟道宽度W A A A形成得窄于另一个的沟道宽度W B B。 通过如上所述的布置,在照射紫外线的初始化状态下,具有沟道宽度W A A的MOSFET的数据信号电流值I H HA < 小于在具有沟道宽度W B的MOSFET中流动的数据信号电流值I HB。 因此,差分放大器的输出根据I H B H I H B B的电流大小关系固定,从而定义数据“0”。 另一方面,在写入数据“1”时,将电荷注入具有沟道宽度W B B的MOSFET的浮置栅电极以提高阈值电压Vt,然后,MOSFET为 设置为“关闭”状态。
摘要:
A semiconductor memory device in which a stored information can be simply erased only by an electric signal so as to be rewritten is provided. The semiconductor memory device includes (a) a semiconductor chip having an array of memory cells, stored information in the memory cells being erasable by light irradiation; (b) a light emitting element irradiating a light into the memory cells portion of the semiconductor chip; and (c) a package in which the semiconductor chip and the light emitting element are encapsulated with a resin in one body.
摘要:
Described is a structure and process for forming a hermetically sealed chip. This hermetically sealed chip will greatly simplify packaging requirements and eventually lead to the realization of a "packageless chip". The hermetic sealing is composed of two parts, an extremely thin passivation layer which is deposited over the entire chip top and side surfaces and a passivation layer which is deposited over the bonding pad surface. Preferably, SiN is deposited as a chip surface passivation layer and Ni is selectively deposited as a metal passivation layer. The extremely thin nitride layer will minimize the stress and the amount of hydrogen in the SiN film and minimize deleterious effects upon device performance caused by stress and hydrogen. The thickness of the metal passivation layer may be the same as that of the dielectric layer so as to give a planar surface or it may be thick enough so as to give a protruding metal passivation bump.
摘要:
Described is a structure and process for forming a hermetically sealed chip. This hermetically sealed chip will greatly simplify packaging requirements and eventually lead to the realization of a "packageless chip". The hermetic sealing is composed of two parts, an extremely thin passivation layer which is deposited over the entire chip top and side surfaces and a passivation layer which is deposited over the bonding pad surface. Preferably, SiN is deposited as a chip surface passivation layer and Ni is selectively deposited as a metal passivation layer. The extremely thin nitride layer will minimize the stress and the amount of hydrogen in the SiN film and minimize deleterious effects upon device performance caused by stress and hydrogen. The thickness of the metal passivation layer may be the same as that of the dielectric layer so as to give a planar surface or it may be thick enough so as to give a protruding metal passivation bump.
摘要:
A ROM card unit having a card package accommodating a ROM card board on which ROMs allowing data stored therein to be erased by ultraviolet radiation are mounted. A transparent cover permitting ultraviolet light to transmit therethrough is provided on a first side of the card package where there are ultraviolet radiation windows of the ROMs. An ultraviolet shield member for preventing unwanted erasure of the data in the ROMs is mounted on the first side of the card package in such a manner as to be removable therefrom.
摘要:
An assembly structure and a method for making a ceramic lid for a hermetically sealed package for an EPROM circuit are disclosed. The assembly structure includes, in combination, a ceramic lid, a UV transparent lens, and two fixtures for supporting the lens in the lid. The two fixtures are configured to contact the lens only at predetermined areas which are not crucial to UV transparency. The UV transparent lens is hermetically sealed to the ceramic lid by firing the assembly structure. The assembly structure prevents the lens from attracting foreign particulate matter during firing, thereby leaving the surfaces of the lens clean. The method provides a ceramic lid having a UV transparent lens hermetically sealed thereto, which finds wide use in integrated circuit packages for high-density EPROM's because of the untainted surfaces of the lens.
摘要:
An UV-EPROM has a window for transmitting ultra-violet rays during the erasing operation, which is covered by a shading sheet including a metallic film, a polyimide film laminated on the upper surface of the metallic film, and a bond film attached to the lower surface of the metallic film.
摘要:
An EPROM device is constituted by an IC lead frame having an island area and a plurality of lead wires, an EPROM IC chip mounted in the island area of the frame, a plurality of wirings, each connecting the bonding pad of the IC chip to one of the lead wires, a layer of silicone resin material formed on the upper surface of the IC chip, a window plate placed on the surface of the silicone resin layer for transmitting ultraviolet rays and bonded to the silicone resin layer, and a molded package of epoxy resin encapsulating the chip island area, the EPROM chip and the silicone resin layer so as to expose the upper surface of the window plate.
摘要:
An apparatus and a method for forming a protective package for an EPROM circuit are disclosed. The protective package includes a two piece inner ceramic package and a molded outer plastic package. The inner ceramic package includes a base member upon which the chip is mounted for wiring to a lead frame, and also includes a protective cover with a radiation transparent window that covers and protects the chip and wires. The base member and the protective cover are bonded together to hermetically seal the chip. The molded outer plastic package is formed in a mold that includes an elastomeric plug that contacts the top of the window to isolate it from the mold cavity. The plug prevents plastic from covering the top of the window during molding.